How to synchronize measurements between two cRIO-9024 chassis?

[hakanb]

I would like two synchronize the measurements between analog inputs (better than 1 msec) from two different cRIO-9024 chassis? What is the easiest way to do that?

[ThSa]

It depends on where you want to have the sychronization.

Do you expect to have the FPGA data acquisition/generation synchronized or do you only want to have the NI VeriStand primary control loops synchornized which would be a little bit more complicated since you would have to create your own custom timing source for the primary control loop.

I assume for now, that you want to have a tight synchornization between both systems which would mean that you would want to synchronize the FPGA itself, since the primary control loop is timed off of the FPGA.

There is actually a really good white paper online that explains how to synchronize cRIO chassis with a DIO module: http://zone.ni.com/devzone/cda/tut/p/id/4217

It explains ways to just have a start trigger or a shared clock (shared clock whereas one cRIO is the master and all others are slaves or you could even use a complete independent external timing source). The advantage of a shared clock is that it is guaranteed that the systems don't drift over time. The shared clock can be used as a cycle synchronization or if you really want to have a tight sync between input and output the shared clock has to be sent twice per cycle. The first one would trigger the input and the second one the output. In most cases the simple cycle synchronization is enough though. If you choose to go with the cycle synchronization (one sync pulse per iteration) NI VeriStand will handle the latency check for you. In the other case, where the sync pulse is actually used to determine the input and output operation itself, the latency check gets a little bit more tricky.

As I mentioned before, a simple sync pulse (one per iteration) is in the majority of the applications enough.

Let me know if you have any questions

T