From Friday, April 19th (11:00 PM CDT) through Saturday, April 20th (2:00 PM CDT), 2024, ni.com will undergo system upgrades that may result in temporary service interruption.

We appreciate your patience as we improve our online experience.

VeriStand

cancel
Showing results for 
Search instead for 
Did you mean: 

How to deploy a system definition file to other desktop PC (Windows)

Hi All,

 

I have created a system definition on a desktop PC with windows OS. i want to deploy that to other desktop PC with windows OS. Both the PCs has NI VeriStand 2010.  While selecting target in the system definition file, if i select operating system as Windows, then IP address is coming as local host by default and i am not able to change that ip address.

 

Can anybody please let me know how i can deploy to other desktop PC with windows OS.

 

Thanks,

Harika

0 Kudos
Message 1 of 8
(8,007 Views)

There is no capability to deploy a PC Engine configuration to a remote desktop PC. In order for this to work, you'd need to have an unconnected PC Engine already running idle on the remote PC waiting to be deployed to. This never happens in NI VeriStand.

 

However, you can achieve similar functionality through another means. What you can do is to bind your VeriStand Project to the remote PC's VeriStand Gateway and instruct the remote PC to deploy that System Definition file. At this point your local PC is acting like a remote client. Rather than using its own VeriStand Gateway and deploying the PC Engine itself, it is telling the remote PC's VeriStand Gateway to deploy the PC Engine. At that point it is transparent that your PC is a remote client rather than a local client. Things like the Workspace will work as usual.

 

Follow these quick steps to try this out:

 

1. Remote communication via the VeriStand Execution API uses TCP ports 2035 and 2036. Make sure these are open and not blocked by firewalls on either side.

2. Create the System Definition to use a normal Windows controller set to "localhost".

3. Copy this System Definition file to a location the remote PC can access. To make this work right, you have two choices:

     a. Copy it to a network drive that both computers can access, such as \\MyNetworkDrive\MySysDef.nivssdf. Then in your VeriStand Project right-click the System Definition node in the tree and select to replace it with this version so that the local project also points to the network drive version.

     b. Copy it directly to the remote machine in the exact same directory as the host machine. For instance, if it's located at c:\temp on the local host, copy it to c:\temp on the remote machine.

4. Right click the project node and select Properties from the shortcut menu. In the VeriStand Gateway section of the properties dialog, change the Gateway IP Address to be your remote PC.

5. Make sure NI VeriStand 2010 is started up on the remote machine. Now you're ready to go. From your local VeriStand Project select Operate >> Run. This will deploy the PC Engine on your remote target and start the workspace. The Workspace and the tools will direct their communication to the remote Gateway on the remote PC, but it will be transparent to you.

 

One last thing to keep in mind: The VeriStand Gateway publishes buffered waveform data used by the VeriStand Workspace graphs using UDP multi-casting. Sometimes UDP is not very friendly. To make graphs work properly, you will need to check a couple settings on the instance of VeriStand running on the remote PC. From that instance of VeriStand select Tools >> Options and navigate to the UDP Streaming section. Here you will see the settings for the UDP multi-casting. You can see the ports used, the multi-cast address and the TTL factor. This Time-To-Live (TTL) factor is important. This basically describes how far (in terms of subnets) the UDP packet can get from the host. Every time a packet passes through a subnet, it decrements this TTL. When it reaches zero the packet is discarded. The default TTL factor is set to zero for security reasons, which means the UDP packets never leave the host computer. Setting this to 1 means the UDP packets are sent to the local subnet only. TTL=2 gets you one level further.

 

Sorry if this is a lot of steps, but once you get the hang of this and get it working, I think you'll find it's very powerful technology. This allows you to have any number of remote client connections to a single host Gateway. This means you can have distributed client UIs, as well as splitting up the work of running your PC Engine simulation from the other client tasks.

 

Let me know if you have any questions.

 

 

 

 

 

Jarrod S.
National Instruments
0 Kudos
Message 2 of 8
(8,003 Views)

Hi Jarrod,

 

Thanks for your reply.

 

1. I tried with the steps you mentioned in the previous post and it worked.  But I observed like for that to work, system definition file and model DLL should be in the both PCs in the same path, do we call this really as a deployment.  In my understanding this is like a gateway sharing , instead of using own PC's veristand gateway, it is using remote PC's gateway with own PC's engine.

 

Please let me know whether my understanding is correct or not.

 

2. I need one more clarification related to VeriStand. In my system definition file, i have added a DAQ device which has some analog outputs. I have mapped these analog outputs to my model inports. When I am trying to run this on a localhost, I am getting an error saying :

 

Measurements: Requested value is not a supported value for this property.
=========================
NI VeriStand:  Property Node DAQmx Timing (arg 1) in DAQmx Timing (Sample Clock).vi:2->DAQ Engine.lvlib:AIAO None Set Timing and Source.vi->DAQ Engine.lvlib:DAQ Set Timing and Source.vi->DAQ Engine.lvlib:DAQ_Init Devices.vi->NI VeriStand Engine.lvlib:Initialize DAQ Data.vi->NI VeriStand Engine.lvlib:VeriStand Engine State Machine.vi->NI VeriStand Engine.lvlib:VeriStand Engine.vi <append>
Property: SampTimingType
You Have Requested: Sample Clock
You Can Select: On Demand

Task Name: AnalogOut_AO

I am not able to find where i can change the Sample timing type to On Demand  in VeriStand. I have checked in DAQ Configuration Page and Channel Configuration Page but no use. In Chassis Configuration Page, if i select chassis master hardware device as DAQ, then also i am not able to find "On Demand" in the drop down box of Export Sample Clock. Please let me know how can I resolve this.

 

Thanks,

Harika

0 Kudos
Message 3 of 8
(7,987 Views)

1. You are certainly correct that this is more like Gateway sharing than deployment. There is no automatic means to transfer all the dependencies to the remote PC.To make this work you might have to consider keeping all the dependency files like models relative to the system definition on a network drive.

 

2. Are you using only analog outputs? I wonder if this might be related to using analog outputs without any analog inputs for your master DAQ device. You can try going to the DAQ device page in System Explorer and checking the Turn of HW-Timed Single Point Support checkbox for AI and AO. This will change the task configuration to be On Demand.

Jarrod S.
National Instruments
0 Kudos
Message 4 of 8
(7,977 Views)

Hi Jarrod,

 

Thanks for your reply.

 

I checked the "Turn off HW-Timed Single Point Support checkbox for AI and AO" and i am able to deploy the system definition file. My model has two inports and one outport to display the sum of the inports. I have mapped one analog output ao0 to one inport and ao1 to other inport in system definition file. In the workspace screen, I have created two controls for the two analog outputs and one indicator for outport. When I am changing the value of the analog outputs, my outport value is not changing.

 

I have tried the same thing with out using DAQ card means, in the workspace i have created two controls for the two inports and one indicator for outport. In this case, when i am changing the value of the inports, i am able to see the sum of the inports being displayed in my indicator. In system definition file i have not configured any mappings.

 

Can you please let me know whether i need to do any additional settings when i am using HW with VeriStand.

 

Thanks,

Harika

 

 

0 Kudos
Message 5 of 8
(7,940 Views)

 


@harika wrote:

 

I checked the "Turn off HW-Timed Single Point Support checkbox for AI and AO" and i am able to deploy the system definition file. My model has two inports and one outport to display the sum of the inports. I have mapped one analog output ao0 to one inport and ao1 to other inport in system definition file. In the workspace screen, I have created two controls for the two analog outputs and one indicator for outport. When I am changing the value of the analog outputs, my outport value is not changing.

 

 


I would double check the mapping you made here. Are you sure you mapped the analog output channel as the source and not the destination for the mapping?

 

Jarrod S.
National Instruments
0 Kudos
Message 6 of 8
(7,935 Views)

Hi Jarrod,

 

Thanks for the reply.

 

In the workspace screen, I didnt mapped controls to the analog outputs correctly. Thats why i got the previously mentioned issue.

 

Now i have added analog input to my system definition file, but I have not done any mapping to the analog input. Externally i have connected ao0 to ai0. In the workspace screen, I have created an indicator for ai0. I started running the project from project explorer, to my surprise i found  the value in ai0 (indicator) as around 3.0V though the value of ao0 is 0V. I measured the value of ai0 as 0V through multimeter manually with the help of connector blocks. But in veristand workspace screen it is showing as around 3.0V.  Then I have incremented the value of ao0 to 1V, the value in ai0 indicator also increased to around 4.0V. But when I measured manually the voltage at ai0 , it is showing as around 1V. I have the attached the screen shots of the workspace for reference. I am using PCI 6224 and PCI 6703 hardware.

 

Can you please let me know why veristand is behaving like this.

 

Thanks,

Harika

 

Download All
0 Kudos
Message 7 of 8
(7,904 Views)

I would first see if this behavior is any different when using Test Panels in MAX. Sometimes things like this can be explained as grounding issues or the like.

Jarrod S.
National Instruments
0 Kudos
Message 8 of 8
(7,899 Views)