FPGA Configuration file for myRIO

[MarcDub]

I am trying to use a MyRIO to learn using Veristand. I am currently using Veristand 2017 along with LabVIEW 2017.

I can run models on MyRIO from within Veristand, and I can control the I/O using LabVIEW 2017. I can switch from one another but I have to remove the Veristand Engine from myRIO and reinstall it after running a LabVIEW project (that was indicated as a bug back in 2012  as indicated by /t5/NI-VeriStand/VeriStand-error/m-p/1922123 and it apparently still has not been fixed).

What I would need is the FPGA configuration file required by Veristand 2017 to access the I/O of myRIO. It is very surprising that this file (*.fpgaconfig) is not easily available nowadays. I have found a tool that I could use to allegedly build such a file (/t5/NI-Labs-Toolkits/NI-VeriStand-FPGA-Based-I-O-Interface-Tools/ta-p/3493285 ) but as far as I tried, it is not compatible with LabVIEW 2017.

I found this recent post (/t5/Academic-Hardware-Products-myDAQ/myRIO-and-Veristand/td-p/4006835?profile.language=en ) but it was not very useful.

If any of you could give me access to the *.fpgaconfig file to use a myRIO within Veristand, I would really appreciate it. Any explicit help on how to build such a file would also be very appreciated.

[MarcDub · Accepted solution]

I finally took the online LabVIEW FPGA course and was able to create configuration and bit files to use the FPGA I/O of a myRIO with VeriStand.

I created a document that describes how those files were created. The FPGA configuration and bit files along the LabVIEW project are attached to that document. The link to the document is: forums.ni.com/t5/Example-Code/FPGA-Configuration-file-to-use-myRIO-with-VeriStand/ta-p/4131193