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Error 537707 Occurs When Deploying Scan Engine and EtherCAT Custom Device

Hello,

 

I try to import a Labview FPGA model for Veristand. However I have a problem with the "user variables". I cheched on the net and it said that maybe I have the compilation in another language than english. However I have labview in egnlish and veristand in english.

https://knowledge.ni.com/KnowledgeArticleDetails?id=kA00Z000000g1sISAQ&l=en-US 

Or maybe I " If you have the UDV container with different name when creating a bitfile from LabVIEW, VeriStand will throw error 537707 when the bitfile is deployed" it is what I found on the net however I don't understand very much this sentence.

 

Thank you for your help. I put some photos to show you.

 

Leo

Grusta07_0-1656918299813.png

Labview FPGA

Grusta07_1-1656918579997.png

Properties of the labview FPGA program

Grusta07_4-1656918653038.png

 

Grusta07_2-1656918600137.png

 

Grusta07_3-1656918614684.png

 

 

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