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Deployment Error

Hello, 

 

I have a very simple example of a Simulink model that includes a subsystem. It has a mix of Simulink/VeriStand Input and Output blocks as shown below. However, when attempting to deploy the model, I get the following error:


NI VeriStand: The size of the imported model data in the system definition file conflicts with the size in the specified model file. This error can occur if the model file contains a different number of inports, outports, signals, or parameters than when it was imported. This error also can occur if two or more models contain a global parameter with the same name but different dimensions

 

I have tried following this knowledge article with no success Error -307702 When Deploying VeriStand System Definition to Real-Time Target - NI

 

Out of interest, I tried loading the model in LabVIEW using the Model Interface Toolkit which seems to work. However, I don't then see the VeriStand input and output blocks contained within the subsystem model. 

 

 

Zero_SR_0-1723815515675.png

Zero_SR_2-1723815784886.png

I'd be grateful if anyone has any insight to what might be causing this error message. I have attached a copy of the VS model. 

 

Many thanks 

 

Sam

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What are your VeriStand, Simulink and VeriStand Model Generation Support versions?

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Control Lead | Intelline Inc
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Hello, 

 

VeriStand 2024 Q2

MATLAB 2023a

VeriStand Model Generation Support 24.3

 

 

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I don't have any issues using VeriStand 2024 Q2, MATLAB 2021a and VeriStand Model Generation Support 24.3

The Simulink source is attached.

 

ZYOng_0-1724412559401.png

 

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Control Lead | Intelline Inc
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Thank you ZYOng for taking the time and attaching the files. I can confirm the model you built also work on my setup. After reviewing the example model I put together, I can see that I'm doing something that doesn't make much sense. Effectively, its the same as what is in the image below. I added a VeriStand Output block in parallel to Output 2 within your sub-system model. This then produces the same error as I was seeing previously. There's no actual reason for me to configure the outputs like this. Being somewhat new to VeriStand, I was slightly stumped with regards to the error message I was getting. 

 

Zero_SR_0-1724424472127.png

 

However, the other issue I have is when using the LabVIEW Model Interface Toolkit. When I use the VeriStand Input/Output blocks in Simulink, they do not appear in LabVIEW when using the Get Model Information.vi example. If you have the MIT toolkit installed, perhaps you can import the vs model you attached previously using the same example. It would be interesting if you see the same behaviour.  

 

Whilst I've been using VeriStand to debug models, I was hoping to run the model in LabVIEW using the Model Interface Toolkit to give me greater flexibility with programming. However, if the VeriStand blocks are not compatible, its quite likely I'll be forced into using VeriStand! 

 

 

 

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