N200 FPGA programming

[CrazyEce91]

How can I program the fpga of ettus n200? Can I use Labview? 

[yamadj]

Hello CrazyEce91,

Thanks for posting in our forums! I'm unsure about that piece of hardware for LabVIEW FPGA since the N200 is coming from Ettus. Below I've posted the devices that I do know work with LabVIEW FPGA.

Supported FPGA Targets for FPGA IP Builder - http://digital.ni.com/public.nsf/allkb/AAC7FDD4BABCDEA186257CA2000C69E8

Moving forward it would be best to reach out to Ettus and see if they have any insight to add about programming the FPGA of the N200 but it seems that LabVIEW isn't a tool we can use for FPGAs.

 Ettus Technical Support - https://www.ettus.com/support

Best,

[CrazyEce91]

Yes in order to program the N200 you need Xilinx design suite. We are going to use the NI 2942R which can be programmed with Labview fpga module. Is there any guide to programm the 2942R ? cause  the simple stream example is a bit complex with a lot of subVIs

[Stop_Luke_and_Listen]

Hi CrazyEce91,

There isn't a programming guide specifically for the USRP that I am aware of, but if you elaborate on what you want to accomplish, I can try to find a better example and other relevant resources for you.

[CrazyEce91]

I would like to generate two signals on the host and do a simple operation on the FPGA with them(addition,AND,OR whatever) and then sent them to another usrp. Moreover I would like to know how to process a received signal on the FPGA.

Regards

[CrazyEce91]

I have managed to send a signal from the host to the FPGA , process it and then send it back to the host. Now I want to send this signal to another usrp. I know that since I edit the FPGA I a cannot use the USRP API but I have to use the USRP RIO API instead. However, the given example is a bit complex with a bunch of subVIs and I find it hard to understand it.

[Shalini.M]

Do you have any specific questions about any of the subVI that you find hard to understand that we can help answer? 

[CrazyEce91]

Well first of all I would like know how to configure the the USRP RIO in order to work along with the FPGA , as far as I have searched the net I haven't found any simple explanation.Moreover I saw in the example that  there is some configutation for registers. So for a simple example, I would like to generate a sine wave on the host then sent it to the fpga and divide its amplitude by two and then transmit it through TX/RF 0 an 2G carrier frequency. I know I ask a lot but I believe this post will help a lot of USRP-RIO users in the future.

regards