Assuming all of the Data Point Array In and Data Point Array Out terminals are of the same type defined (typedef) type.
Which of the following Block Diagrams is indicating the correct propagation of typedef information through the FOR Loop?
NOTE: Some Block Diagrams may have been modified through the power of GIMP .
Sine the array is the type def, the autoindexing will eliminate the type def propagation. So B shows the coercion dot in the right location.
As far as I understand, we have three kinds of tunnels here: * Shift Registers * Auto Index Tunnel * Standard Tunnel
Not answer a) The second line inside the loop is an auto index tunnel. The data type inside the loop should have an array dimension := dimension – 1 (compared with data type outside the loop before) So answer a has a wrong data type inside the For Loop.
=> in answer b, c, d it seems correct (for second line).
Not c) and not d) Line 3 is a standard tunnel. The data type should not change by transition outside to inside the loop. It remains b) for the correct answer.
@ Crossrulz I can guess the coercion dots after you mention it. I would not be able to recognize them without your help (to mention it). Similar color and to small. In my opinion in answer b) there shouldn’t be a coercion dot, because we have the same data type as before… (But obviously I am wrong).
A.Bernau wrote: In my opinion in answer b) there shouldn’t be a coercion dot, because we have the same data type as before… (But obviously I am wrong).
But they are not the same type. The indicator is defined by a type def. The output of the tunnel is just a cluster. Yes, they happen to have the same underlying data. But they are defined in completely different routes and therefore we cannot guarantee they stay the same.
My personal opinion is that arrays should not be type defined. The clusters they contain should be the type def. That would eliminate some of this confusion and it makes it easier when you have to work on a single element of the array.
OK, I should read and translate the headline before I try to solve the DCLAD ;-) And yes, your reasons sound comprehensible, so you convinced me. Thank you very much for your detailed Explanation!
Following the explanations above and after I had checked the exercise through labview, I agreed with the comments from @Crossrulz, which sum up the behavior of the VI.
(B) is the correct option.
I'm new here and my answer is B Wave from PH.
Hi blink247, welcome.
I will be taking the CLAD exam on monday steve. I've been studying daily clad 2weeks from now and It's fun though tricky sometimes thanks steve.
If my eyes don't deceive me, the answer is:
1. shift register tunnel will append to existing array for every loop iteration (not change its dimensions) so the width of the tunnel stays same.
2. indexed tunnel will pass sub-arrays (or element from the array) for each iteration so the width of tunnel gets thinner.
3. regular tunnel will passively pass the input array (unchanged) to the output array/cluster.
Hope I passed.
The tunnel width is not the concern here. In fact, the tunnel width does not even change based on the number of dimension in the array. Shift Registers are just bigger than regular tunnels. The coercion dots that are really hard to see since they are red on a pink background are what actually matter in this question.
1. Shift Register does no appending. It is the same memory space on both sides of the loop. In this case, it will just pass the original value through.
2. Indexed tunnel passes the elements the array, one per iteration of the loop. This will cause the data type to disconnect from the type def. So the output index tunnel is just an array of whatever elements are inside of the type def, but not the type def itself. Therefore, you get a coercion dot when you write to the indicator.
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