University and Department: Purdue Univerisity, Electrical and Computer Engineering Department
Team Members: Junzhe Geng
Faculty Advisors: Sahm Litkouhi, Barrett Robinson
Primary Email Address: jgeng@purdue.edu
Primary Telephone Number (include area and country code): 219-902-6999
Project Title: Infrared Tomography and Live Video using NI Compact RIO
List all parts (hardware, software, etc.) you used to design and complete your project:
NI CRIO 9012, NI 9401, LabVIEW, LabVIEW Real Time, LabVIEW FPGA, analog NTSC CCD camera, eight infrared transmitters, eight infrared receivers, 5V and 12V power supply, connector cable with fan-out board, breadboard, LM1881 sync stripper, LM393 comparators, rotational platform, stepper motor, resistors, capacitors.
Describe the challenge your project is trying to solve.
The major challenge this project sets forth is to implement the method of tomography to analyze the size, shape, orientation of a semi-transparent object using a rotating platform and only eight parallel infrared beams. Meanwhile another challenge is to use the NI Compact RIO to sample an analog NTSC video signal, capture each frame operation, and update the computer monitor with the captured video during tomography operation. The FPGA in the C-RIO should be programmed to ensure deterministic, real time sampling and capture of the video. Algorithm for tomography must be fast enough to allow continous runs and smooth live video update
Describe how you addressed the challenge through your project.
In order to tackle challenges from live video, an external A/D converter circuit was built to quantize the analog NTSC video signal into 3 bits representing grayscale intensity. This was accomplished by using LM 393 comparators and elementary logic gates in a flash configuration. The A/D converters for the CRIO are too slow to meet sampling requirements for the video. Then cRIO was programmed to synchronize with the incoming digitized video. This means the CRIO would require a digital signal with patterns to indicate where the video started and where each line began. This signal was provided by using the LM1881 synchronization stripper. By creating a state machine in the FPGA that recognizes the patterns on the synchronization signal, the program could define when each pixel could be sampled from the incoming video. After determining when samples should be taken, the next step is to accumulate the samples into a 256x256 pixel image. The samples were place on a DMA FIFO so that a VI on the computer or on the real time controller could pick up the video one frame at a time.
In order to implement tomography, The object is placed on a rotational platform driven by a stepper motor. At each 0.3-degree rotation of the object, eight parallel infrared beams are emitted, attenuated by the object, received and recorded. After 180 degree rotation, all the recorded IR sensor values are combined to form a diagram—“Sinogram”, which is then passed into “Convolution Back Projection(CBP)” algorithm to obtain “Tomograph” – reconstructed cross-section image of the object. In order to overcome limitation from number of sensors, projection data is zero-padded before being filtered in the CBP algorithm. Filter in CBP algorithm is combined with a Hamming window so that undesireable artifacts can be reduced in the reconstructed image. Also linear interpolation method is applied during back projection to overcome limitation in number of data points. Data collecttion from IR sensors are done through analog input module inside cRIO and labview program in FPGA. Then data is transterred from FPGA to microcontroller through DMA FIFO buffer. The CBP algorithm, which is the most computational intensive part of the project, is done by microcontroller inside cRIO.
Commincation between cRIO and host computer is acomplished through "network shared variables". Results including live video, sinogram, tomograph are stored in network shared variables when they are ready, and then the host computer reads the network shared variables in order to display the results on the monitor.
The overall block diagram of the project is displayed below in figure 1.
Figure 1. System Overview
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