How to Apply PRBS to DDS Output Signal?

[wired]

I need to use a PXI Waveform Generator board with DDS output to create a square wave in the frequency range of <100 kbps to 10Mbps.  Once the value is selected, it will remain fixed until I change it, i.e. it is not a varying-frequency output. I would like to apply PRBS to this waveform using some combination of NI hardware, but I haven't yet figured out a way.  I would have liked to use one of of their PXI Intelligent DAQ board to use the FPGA to apply the sequence (thinking I could clock the FPGA with the DDS output clock), but external clocking is apparently not supported.  Any advice on how to accomplish this without spending a fortune on boards would be much appreciated.

Message Edited by wired on 06-01-2008 10:04 AM

[Steve_B]

Hi wired,

I am interested to know more about your application. You are trying to create a square wave of a certain frequency. You have noted that you need DDS, which is often useful for phase continuous frequency sweeping, but in this instance you have a constant frequency. Are you going to be using very precise  frequencies in your application? DDS is only available in our Arbitrary Waveform Generators. Your signal in an Arbitrary Waveform Generator is stored as samples and recreated based on the selected frequency. This is the basis of DDS to create a precise frequency. This reason i bring it up is that you listed your frequency in terms of bps. If it is possible to use a digital signal to represent your square wave without DDS an HSDIO card may be an option. Are you going to be performing any triggering and how many lines do you need with this device?

The reason for my questions is that your square wave could be represented as an analog or digital signal.

There is a VI in LabVIEW that can be used to create a Pseudo-Random Binary Sequence. I have included a link to the help document.

MLS Sequence Waveform
http://zone.ni.com/reference/en-XX/help/371361D-01/lvwave/mls_sequence_wf/#Output1

[wired]

Thanks for your reply, Steve.  I have been working with Samantha in tech support on this, and I think we may have a solution.  I do need better frequency resolution than can be had with a counter-generated system.  My current thinking is that I could use either a PXI-6652 Timing and Sync module or a PXI-5404 Frequency Generator to generate the DDS output clock.  The signal can be routed onto the the PXI backplane on one of the PXI_TRIGx lines.  A PXI-6534 HSDIO card could then be used to generate the PRBS (using the Binary MLS VI) and clock the waveform by specifying the PXI_TRIG line as the sample clock.  MAX shows that the device route is possible. 

NI has also suggested that it might be better to do a front panel route using the available connectors and avoid the backplane, but I'd rather try the backplane approach first, and see what my output signal looks like.  My only concern is that the application needs to provide a continuous PRBS, so there can't be any pauses in the datastream.  I tried the sample VI for the Cont Write Dig Port-Ext Clk.vi on a PXI-8186 platform using a PXI-6120 for the digital I/O, and I had no problem maintaining a continuous PRBS at 10MHz.  Since the 6120 only has a 1024-sample buffer, I'm thinking that the 32MB available on the 6534 should make this an easy task.

If you or Samantha see any problems with this approach, please let me know.

[Steve_B]

Hi wired,

You are right on track with your application. Using a card that has up to 10MHz DO and a large on board memory should allow for a continuous PRBS.

I also wanted to clarify a typo in my previous post where I said that DDS was only available in Arbitrary Waveform Generators. This statement is incorrect. I should have said that DDS is available in some signal generators and also some timing and sync cards. I wanted to clarify this for anyone else referencing my previous post.