sbrio 9636 questions

[adilansari]

1. Is there a way to generate an edge or level triggered interrupt for sbrio 9636?

2. Is there any infomration avialable on Ground structure for sbrio 9636.  Is there a tie point for Analog, Digital and Power planes? 

3. Is an interrupt generated on power fail condition? 

4. What are the options for maintaining the Real Time Clock when power is removed? 

[Spex]

1. Is there a way to generate an edge or level triggered interrupt for sbrio 9636?

You can program the FPGA to detect an a level change on any analog input and assert an interrupt to the procesor or a toggle a digital line.

2. Is there any infomration avialable on Ground structure for sbrio 9636.  Is there a tie point for Analog, Digital and Power planes? 

The negative terminal of the power supply is tied to chassis ground, which is passed through a common mode choke to isolate the analog and digital ground planes.  The digital ground plane is capacitively coupled to chassis in one location.  The analog and digital ground planes have a common, single tie point internal to the PCB.  Each connector (analog or digital) exposes the appropriate ground reference for the IO.  There is a chassis ground lug and some of the mounting holes are connected to chassis ground. These are called out in Figure 2 of the sbRIO manual: http://www.ni.com/pdf/manuals/373378c.pdf

I also suggest reading the "Understanding Ground Connections" section of the manual for best practices.

3. Is an interrupt generated on power fail condition? 

 No, the board turns off on power fail and boots when power is restored.  If you had a mechanism to sustain power through a main power failure, you could detect this failure and handle it in some way.

4. What are the options for maintaining the Real Time Clock when power is removed? 

As indicated in the user manual, the sbRIO-9636 includes an onboard battery to power the RTC when power is removed.

Regards,