Transfering multiple channels through DMA FIFO doesn't work

[Matthias_H]

Hello,

I have a cRIO 9073 with 2 NI 9203 modules. From every module the first 6 channels should be read within the FPGA and transfered to my RT application though DMA FIFOs.

I'm using 2 DMA FIFOs. One for each module.

The FPGA block diagram for writing is the following one:

The shown subVI is not relevant. It does work corrently.

In my RT application I try to read these values this way:

I have only one sensor connected to one module. For example the sensor is connected to channel 3 and all other channels are not connected.

Probe number 17 in the 2nd block diagram shows the same values in the array. But I expected to get the values like this:

0, 0, 0, 1, 0, 0 | 0, 0, 0, 1, 0, 0 | ...

Only channel 3 should have a value different from zero. But all values show the sensor signal.

It's the same when I connect the sensor to another channel.

What's my mistake?

Regards

Matthias

[Matthias_H]

I'm very sorry. I was convinced that the filter subVI works, but this VI is the problem.

I think, I have to use one filter VI per channel. Im my situation 12 filters and not only two. Is this right?

Regards

[Matthias_H]

For all who have the same problem: It works with the filter subVI I posted above. But you have to set the number of channels in the filter VI.

Disadvantage: The resolution maximum is 16 bit.

[Matthias_H]

Hello,

I can't find the button to create an new topic anymore. So I'll use this topic for the question because it's a similar one.

The FPGA source is shown above. I read the values from the DMA FIFOs in the real time application with "FIFO.Read".

The first value I write to the FIFO has to be the first one in my real time application. That's very important so that the assignment is the right one.

After rebooting the cRIO all values are displaced. The first value I send to the FIFO is the second one in my real time application.

When I put my hole real time source within a while loop and "restart" the loop (including the opening of the FPGA reference), all values have the correct indices. Only the first iteration is wrong.

What could be the problem?

I tried to reset the FPGA after opening the FPGA reference in my real time application. But then no values will be written in the FIFOs. I don't know, why.

Regards

Matthias