I am using LabVIEW 8.5 and cRIO 9074 with 9263 (AO) module.
I have an array being generated in my RTCode as a result of an integration. I have to send this signal as output through FPGA, however, I realize that we can only send single elements out of the FPGA, and that too of fixed point data type.
Then how do I send this array out through my 9263 module?
You can use a DMA under FPGA target, and set it to Host to Target.
Then, just update your ourput at your desired rate, by pulling data from FIFO.
Even you can put an array as a control, but it's not recommended, since it takes much more resource to compile it (a lot more gates consumption).
I've an experience compiling a program with 100 elements array with more than an hour compile time while changing an architecture (remove array) take about 15 minutes.
I agree using a 100 element front panel array is a bad idea.
However, the 9263 is a 4 channel 16bit card, making the 4 element front panel control trivial; probably even cheaper then using a DMA FIFO.
I have used two 32 element front panel arrays with no issue.
Back to the OP, what size is your array result front the integration?
Is it multiple samples in time, or a single time sample?