"Here is one thing to try. I
think configuring your FPGA Target to run on the Development Computer
(with Simulated I/O) will not work if you try to run your Host VI on
RT. Try dragging the VI to My Computer and run it from there.
Altenatively, you can reconfigure your FPGA Target to not run on the
Development Computer (what used to be called emulation).
Hope that explains why the VI was broken."
And it solved the problem - running fine now - so this question is solved.