Hello,
I am using a cRio 9076 System with 4 modules. I'm using two AI modules aof the C-Series, the NI 9223 and the NI 9215.
I want to read the values of all 4 ports of the NI 9223 with 350kS/s with a VI at the FPGA (FPGA.VI) and write it to a DMA FITO , this should be possible with the IO-Node operation.
1. If I read the DMA FIFO with the VI at the real time target (RT main.VI-->nnection to the cRio is losed after a time of reading the samples. A window with the message "waiting for response of the target system" appears.
This happens only with a sampling time lower than t=10us. I aquire the samples in Aquire Data.VI and save them into a tdms file on the cRio.
2. If I run the RT Main.VI to read the samples out of the DMA FIFO(RTMain.VI -> Acquisition and Logging.VI -> Aquire and Log Data.VI -> Aquire Data.VI), it reads samples all the time, even if the FPAG.VI don't run. Where did the RT Main.Vi gets the values of the samples, i'm a little confused. Even if the samples are saved at the buffer on ther RT side, after a time it has to be empty?
I've attached the project with the VI's in Zip File. Does anyone have an idea for the first point? I think there is a problem on the real time VI's (Aquire Data.VI), but I don't know whats the problem is.
Thank for your help,
With best regards,
Sebastian
