Real-Time Measurement and Control

cancel
Showing results for 
Search instead for 
Did you mean: 

Managing Shared resources (FPGA Module)

Highlighted

I have some general wondering about Managing Shared resources (FPGA Module). The idea is to share data among few VIs running on a FPGA (cRIO). So far I've bean using memory objects which seem OK but are not really user friendly given that your really are limited on the available data types. I don't really know about how bad the arbitration circuits are, but seems not adapted to read in for loops (should earn access every single call of a read/write).

 

1/ So, not knowing about that, I was wondering if disabling the arbitration for the memory object and creating two non-reentrant VIs accessor (which could read/write a whole bunch of entries at once) would be more efficient ? But I have no idea about how bad the non-reentrantness arbitration circuit are neither. Are they so much worse than the memory object arbitration circuits that it would not worth the pain ?

 

2/ So about non-reentrant VIs on FPGAs : as the data they hold over executions are probably stored in the FPGA itself and not in RAM (as memory object probably are) and given that the non-reentrantness arbitration circuit is not too bad, and that we are not dealing with big data (for instance, few dozens of boolean flags) would they be actually more adapted (fast) than memory objects ?

 

3/ What about global variable on FPGAs ? I Guess, again, arbitration circuits should be ugly. How bad are they compared to 1/ and 2/ ?

 

That's about it so far. I hope somebody actually understands what I mean... I just proofread it, and I'm kind of lost:-)

Cheers ! Long live CompactRIO !

Message Edited by Barbu on 08-14-2008 02:47 AM
0 Kudos
Message 1 of 3
(1,816 Views)
Highlighted

Barbu,

 

You can use Globals in LV FPGA to access data from multiple VIs and if you only need to store a few dozen Booleans I think it will be the easiest solution for you. You are also correct that any data stored in a wire or front panel control/indicator including Globals are stored on the FPGA while data in memory blocks, FIFOs and Lookup Tables are stored in RAM (assuming these resources are configured to use RAM).

 

Using non-reentrant VIs (also called Functional Global Variables - FGV) to share data will cause the data to be stored on the FPGA instead of RAM.

 

To share larger amounts of data between VIs I recommend to use memory blocks or FIFOs depending on the use case. What data types would you like to use with memory blocks that you don't have today?

 

>> but seems not adapted to read in for loops (should earn access every single call of a read/write).

 

I'm not sure what you mean by this comment. In general you can read and write memory blocks in a For loop. What trouble are you having?

Message Edited by Christian L on 08-14-2008 09:56 AM
authored by
Christian L, CLA
Applications Engineering Senior Manager - Automotive and Transportation
NI - Austin, TX


  
0 Kudos
Message 2 of 3
(1,802 Views)
Highlighted

Hi Christian,

 

>> >> but seems not adapted to read in for loops (should earn access every single call of a read/write).

>> I'm not sure what you mean by this comment. In general you can read and write memory blocks in a For loop. What trouble are you having?

 

What I mean is:

 

1/  if we use a memory block configured to use arbitration for reads and writes and if we put a read (or a write) in a for loop to read, let's say 10 addresses (0-9) of our memory block, then the arbitration circuit will be executed 10 times (one for each iteration).

 

2/ On the other hand, if we configure this same memory block to never arbitrate neither reads nor writes, and build a non-reentrant VI that loops over our 10 adresses for read, then only the arbitration circuit of the non-reentrant VI wil be executed and only once (only *one* call to our VI to read 10 addresses) !

 

I tested both and saw that it was working either way, but my question was more about the performances. In 1/ we have 10 "memory block access" arbitration circuits executed ; in 2/ we have only one "non-reentrant VI" arbitration circuit executed : is one solution faster than the other, which one ? is one solution smaller (FPGA-wise), which one ? In other words : is the arbitration circuit non-reentrant VI calls "bigger" than the arbitration circuit for memory block access ? If so, how much "bigger" ?

 

Regards,

Barbu.

 

 

0 Kudos
Message 3 of 3
(1,798 Views)