Looking for guidance on NI-9220 electrical characteristics that are not provided in the datasheet

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1. Does the NI-9220 contain a track and hold (or sample and hold) upstream of the ADC input?

Discussion: The documentation for the NI-9220 indicates that it is a successive approximation converter. If there is no 'hold' function prior to the ADC, then an error can be caused if the input signal is changing significantly while the successive approximation algorithm runs. Can you please let us know if there is a 'hold' function built into the NI-9220 'front end' to eliminate this concern?

2. What is the input bandwidth of the NI-9220?

Discussion: The datasheet says the -3dB bandwidth is > 100 KHz. Can you please provide the typical -3dB corner frequency and roll off rate? (Is this filter response a single pole roll off?)

3. The datasheet gives the input over-voltage protection level as +/- 30V. Can you please help us to interpret this parameter? Does mean that if the input voltage ever exceeds 30V that the ADC should be considered possibly damaged as a result (even if the current into / out of the ADC input at the time was 'limited' to below XXXX mA?

Discussion: Id like to better understand the architecture and limitations of the NI-9220 input protection feature. Is this feature a 'voltage clamp' to ground (similar to a bi-directional zener diode)? In one proposed application, the ADC input would be driven thru a 10K series resistance which would provide a degree of current limiting if the input protection feature were ever turned on. Is it possible to get a better definition of what the V / I characteristics are for the ADC input protection feature and what the 'do not exceed' voltage / current levels are at the input to the ADC to prevent any possibility of damage to the ADC? We would like to prevent any possibility of over-voltage induced damage to the ADC and are hoping to eliminate any chance of the input voltage exceeding 30V. However, if there is a small possibility that the input voltage could exceed 30V in a transient case (perhaps during a system failure mode scenario), we would like to know if current limiting the input current during the over-voltage event will eliminate the possibility of damage to the ADC. Knowing the VI characteristics of the protection circuit and what the 'do not exceed' voltage and current levels are for the device will help us to better understand if there is a risk of damage to the ADC.

Thank you in advance for your consideration