04-05-2021 08:16 AM
When I use an indicator or control the LabVIEW FPGA Simulator is not bothered by this, but the compiler throws fatal errors. Every attempt to send information into or out of an FPGA Timed Loop results in a compiler error. How can I legally communicate into and out of a Timed Loop? The information so far says Timed Loops can send information to an Indicator as long as no other outside loop writes to it. But I can't find any information on how to send information into an FPGA Timed Loop to control its flow. Both throw Compiler errors.
04-05-2021 08:56 AM
I tend to use FIFOs. You could possibly also use a Register to hold a value. I have used terminals and Local Variables to pass data into a Single Cycle Timed Loop (SCTL), so I wonder what your code looks like.
04-05-2021 09:07 AM - edited 04-05-2021 09:12 AM
This LabView Program was an extracted LabView example modified for 2 loops to communicate, with one of them being the FIFO Single cycle Loop. even though the LabView FPGA and simulator environment find no problem with this, the compiler throws fatal errors. I even tried Global Variables and it did not like that either. Attached is the Global Variable .vi … the main project is 18MB and the upload limit is 10MB.
04-05-2021 09:09 AM
Here is the LabView FPGA File, I could not upload the entire Project because it was 18MB and the upload limit is 10MB
04-05-2021 10:08 AM
Your problem is that you are reading AND writing in both time bases. You need one loop to perform the write and another to read. I think you can replace a bunch of the reads by simply using Shift Registers and/or wires.
Generally, you should have 1 place that writes to the variable and 1 place that reads the variable.