I'm using a cRIO 9039 with NI 9263 and NI 9401 modules. When I'm trying to compile on the FPGA, the error "warning during VIVADO launch - Default location for XILINX_VIVADO_HLS not found" occurs and the compiler is stuck on "generating xilinx IP". I'm attaching my project. Anyone knows how to solve this? I tried to compile another project and it was successful though
