Is there any Labview FPGA VI simulation support available for sbRIO 9606 and 9642 devices?

[aijaz]

Kindly confirm me if there is  any "Cycle-Accurate Simulation with Xilnx ISim" or "Cycle-Accurate Co-Simulation with Mentor Graphics Modelsim" simulation option available for sbRIO devices. If not, then is there any possibility of its provision for the same devices by NI in future?

This is a serious issue as cycle-sensitive applications then cannot be debugged on FPGA Target prior to compilation and because of this inability to locate synchronization issues, i cannot hence implement my application on NI FPGA target,

What other devices with provision of simulation capability does NI recommend? i found a link regarding this: http://digital.ni.com/public.nsf/allkb/02F5FA55FC28BDE1862578A30071F975. Is that all?

Regards

[JoeySpinella]

Hi Aijaz,

I see that this is what you are referring to: http://www.ni.com/white-paper/12942/en

It is true that the Isim simulation option is not available for the sbRIO devices you listed. This simulation capability is limited to specific models, such as the PXI-7854R. You can find this information in each product manual or here: http://zone.ni.com/reference/en-XX/help/371599E-01/lvfpgahelp/fpga_target_docs/.

[JoeySpinella]

Aijaz,

I wanted to follw up with you further - you said that this was a serious issue. What are the root synchronization issues that you are attempting to debug? Does this completely prevent you from devleloping on sbRIO?

While we don't have cycle-accurate simulation for our cRIO's or sbRIO's, we are able to analogously analyze cycle-by-cycle code in the LabVIEW paradigm on development computers using Single-Cycle Timed Loops. Each iteration of a single-cycle timed loop is equivalent to 1 cycle in the FPGA.

[Olivier_L]

Hi Joey,

I'm facing the same issue, where I'm unable to simulate my target behavior with ISim.

My targets are either sbRIO 9626, or cRIO 9116 or cRIO9082.

The other issue is that I'm unable to find a list of targets working with ISim. I've had a look in the Targets documentations in Help, as explained in your link, but was unable to find any statement about an ISim support or not.

Event looking in PXI-7854R help documentation, which seems to be the only target supporting this simulation mode (it's the only one I've seen referenced in documentations so far), I was unable to find in help a statement explaining its compatibility with ISim or ModelSim.

Where can we find the information on supported targets?

And why sbRIO and cRIO are not compatible when PXI-7854R is? Knowing that the same FPGA component is used in PXI-7854R and cRIO-9118 for instance!!

Kind regards,

[[dk]]

As I understand it, this is not supported on sb/cRIOs. This help documentation says "Note Not all targets support cycle-accurate simulation. When the FPGA target supports simulation, you have the option to create a simulation export from the Build Specifications shortcut menu."--cRIOs have this grayed out, as do sbRIOs.

Besides this, it makes less sense for these boards to have cycle accurate simulation, as we do not have direct access to the FPGA pins as we do on FlexRIO.

[Olivier_L]

Hi Dan,

Thank you for your answer, and sorry for the answer delay.

It seems effectively that it's only supported by FlexRIO, but as said in help and documentation, you should look at help in specific target documentation to know if cycle accurate simulation is supported, but it's not mentionned anywhere (even for FlexRIO which supports it).

I think it's a pity to have to create a project with all wanted targets and look at Build specification options to know if it's supported or not!

Why not to have a dedicated note somewhere (Help, target documentation, NI Website) explaining that only FlexRIO supports it?

By the way, I understand that it could make less sense to have these simulations on sbRIOs, but with RMC (RIO Mezzanine Card) we are really close to the direct FPGA pins access.

The other reason I wanted to use it, is that with LabVIEW, we only can execute the VIs in simulation. When I need to see if a specific process works correctly, I need to execute step by step the code to see if a transition goes at the expected time for instance, and it can be time consuming and not really clean in verification. The cycle accurate simulation permits to get graphs on every pin transition and time measurements to verify good working.

More than that (and maybe there is a CAR to create on that) is that when you test an FGV using feedback nodes, and when that nodes have a global initialisation value, you can't simulate it with LabVIEW because each time you execute the FGV, the global initialisation is used (VI is reloaded), and that's really blocking me for some unit test validations.

Regards,