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Image compression using Sb-RIO 9632 (FPGA-Spartan 3) + VHDL code

Hi Expert,

 

Currently I doing research in medical imaging, i tried to used VHDL code from Model SIM and ISE to compile in LAbVIEW using CLIP. Until now i didnt know my result regarding the simulation and compile are valid or not. I aspect the FPGA will read the pixel by pixel and send to the GUI. I really appriciate, if any forumers to share their expert and knowlodge regarding my current research.

 

AbM

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My best advise would be to use an image that you know compression result as an input. Then, compare whether the result is correct.

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Ok many thanks kateB
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