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Fixed point representation and FFT on FPGA

When Im recieving data from analogue inputs it is in FXP representation with word length 20 and interger word length of 5. After performing FFT and multiplications I have data of the type <s,64,34>. I want to perform an inverse FFT on this but the input to the FFT is limited to a word lenght of 24. Is there any way around this without a loss of data?

 

My code is also not compiling. Would this be the reason. I didn't feel that it would but would just result in less accurate results. Is this right?

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Hello,

 

It wasn't specifically mentioned, but was your data turning to double format when you hooked the output of the last multiply to the input of the FFT? Sometimes missmatch's on FXP data point will change the whole data line to double as a warning and then the program won't compile because that is an illegal data type for FPGA. To change the data type however, I would say to go into the properties of the multpilies and deselect Adapt to source on the Output Configuration tab. Then Select a rounding mode that's suitable, I would say Truncate and make the length of the word 24  bits. This will give you the correct output for your FFT input. This will have "less" information, but it is the way to effectively make sure everything fits.

National Instruments
RIO Embedded Hardware PSE

CompactRIO Developers Guide
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