Failed to load shared library lvfpga_runt.dll:

[go_sox]

Has anyone had this problem? While trying to run my latest version of Real-time code this error popped up:

LabVIEW:  Failed to load shared library lvfpga_runt.dll:FPGAResTree_GetProperty:C. Ensure that the library is present on the RT target. Use MAX to install NI software or FTP to transfer custom libraries to the RT target.

My host computer has the lvfpga_runt.dll listed in two places:

C:\Program Files\National Instruments\LabVIEW 2011\resource\Framework\Providers
C:\Program Files\National Instruments\NI-RIO\data_devicesetup

It sounds like the sbrio (9632) board can't find it, but I'm not sure what it would be called in Max, or how to get it onto the sbrio board.

Any help would be appreciated.

[Sev_K]

Hi,

Double check that you have all the required software installed on your computer and your sbRIO. Refer to the Software for sbRIO page to check if you have all the correct software installed on your computer. Regarding the software on the sbRIO see page 6 of the CompactRIO manual.You should at least have the NI-RIO driver intalled on your sbRIO to be able to communicate with your sbRIO.

[zymale]

Do you  solve your problem? If you have  solved  your problem,  can you tell me how you solve this problem.Because I have the problem when I am using NI 9074.

[go_sox]

As far as I can tell, the problem was caused by a FIFO that was too large. After talking to Daniel at NI Support, I wrote a simplified version of what I was trying to do, and that worked. I realized that I had reduced my FIFO size in the simplified version, and then reduced it in the original version, and the problem went away.

I had also been getting error 1055, but found that was caused by my FIFO reference not being properly connected to the FPGA reference.

Good luck!

[zymale]

Thank you for your reply.

[ShekharK]

I recently upgraded to 2010 Labview, RT and FPGA. I have a PXI with RT (NI 8106) and FPGA (NI7813R).

I am getting the same error "Failed to load shared library lvfpga_runt.dll".

I have 2 small FIFOs (U32) in my code to communicate between RT and FPGA. Size of each FIFO is ~50 entries.

Not sure how to resolve this issue.. Any help is appreciated.

[Esteban.R]

ShekharK

If you tried to compile one of the examples do you get the same error? By doing this we can ensure if the problem is with the software or the code.

Regards

Esteban R.

[ShekharK]

I changed my FIFO code on the RT side and looks to be working.

I had to call a reference of the FPGA VI in the RT code, then configure the FIFO (via this reference), then do a read/write operation. This worked.

Earlier (where I was facing issue), I had dragged the FIFO from my project explorer in to my RT code. If this mechanism is not allowed, not sure why is the tool allowing me to even do it?

Regards,

Shekhar