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FIR filter NI 5170 in FPGA from example project

Hi all,

I have a NI 5170 reconfigurable oscilloscope with which I want to process the data with a FIR filter. I want to use a lowpass filter and decimate the data to reduce the bandwith and avoid overflow issues and reduce post-processing on the host.

 

Starting from the 'Multirecord Acquisition (NI 5170)' example project, attached, there is a FIR filter and decimator already built in. The decimator is straightforward, but I can't figure out what is the right code required to configure the FIR filter. It looks like it's making use of the 'coefficient handshake go' register that is created in the 'Create Digital Correction Registers' (screenshots of these attached). There is some text regarding loading the filter coefficients (Single Channel FIR filter), but I can't for the life of me figure out what it means and how to apply it. I can generate the coefficients with something like the 'Generate FIR Windowed coefficients.vi', as attached, but I don't know how to pass them in the FPGA code.

 

Does anyone have any examples or more detailed instructions on how to configure the FIR filter?

 

Thanks!

Robert

 

P.S. I'm aware that during simulation the FIR filter code will be by-passed because of the conditional disable structure.

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