I'm working on FPGA-VI on a cRIO 9076 and I got a startup phenomenon which I would be glad if anybody could provide any help.
The problem occures if I restart the cRIO out of the project tree. 10 seconds later the oscilloscope showes a peak on the digital outputs (see picture).
Is this normal? Does anyone know how to prevent this behaviour?
The strange thing is, if I switch off the power supply of the cRIO and switch it back on, I was not able to observe any similar peak until now.
Later when the FPGA-VI starts everthing is working properly, but I didn't expected this startup phenomenon.
explanation to the picture:
- CH1 is attached to NI 9401 - DO4 (a trigger signal, set from FPGA-VI)
- CH2 is attached to NI 9401 - DO5 (a window signal set normaly high from FPGA-VI)
- CH3 is attached to another component
Thanks for helping, I was not able to find a manual or a topic which matched this problem.
This is a known problem and I have experienced it myself-- we fried some hardware too because of it. There is a forum topic on it somewhere I recall. Ended up working around it in hardware but there is no solution that I know of.
For hardware workaround we made the board the 9401 was controlling look at one of the spare 9401 outputs - DO7. The other outputs, DO0 to DO6 would only have an effect if DO7 was low. That way then they all flashed high on reset nothing would happen.
My pull down thinking was that the 9401 might be going into "read mode" (tristate) briefly and if there was a pull up or if it was floating at the "switches" on the other board, that could cause unexpected behavior during reconfig.
It should be simple to test if that's the case by disconnecting the "other board" and applying a 10kOhm resistor to ground and observing the behavior.