Deploy to cRIO changes CSeries modules from FPGA to RTScan

[stuartparkinson]

Just upgraded controller from an older cRIO to a cRIO-9048. After lots of pain deleting the old target and adding the new RIO and all the new cards and editing all the names and adding all the files to the new target and adding the Ethercat devices and so on and so on I finally go the project compiling and running on the RIO - however the FPGA code crashed with error 

Error 65673 occurred at an unidentified location

Possible reason(s):

The slot is not configured to the correct program mode. Ensure the slot is configured to run in LabVIEW FPGA.

because the c-Series modules in the chassis were not configured to FPGA mode.

I checked in MAX and sure enough every card was set to Real Time Scan (IO Variables) and not to LabVIEW FPGA. I dutifully set them all to FPGA mode, deployed my project and got the same result. Checking in MAX again showed the cards had been changed from FPGA back to RT Scan!. So I tried again, this time right clicking each card in the project and selecting Deploy Module Modes. Checked in MAX and the modules had indeed been changed back to FPGA as desired, so I ran my project and it crashed again. Yep, the deploy had changed then all back to RT scan. (Yes, the modules do reside under the FPGA target in the project, not under the Real Time Scan Resources project item).

I messed about a lot trying different orders of things, re-compiling, etc. etc. to no avail. Every time I deployed the modules were the changed back to RT Scan mode which crashed the FPGA code (which all ran just fine on the previous RIO)

I tried a dummy project, added the target RIO, added the FPGA, added all the modules to the FPGA, deployed, and everything was fine - checked in MAX and all the cards were correctly set to FPGA mode.

So in my real project I deleted the RIO target, added it newly, added the FPGA, added all the cards to it, renamed them and the channels to match my code, added in the code files to the target, deployed, and BAM - all reset back to RT Scan mode.

So now I have a whole plant that needs to be running on Monday that I just cannot get to deploy properly. Anybody got any ideas? Why would the deploy action change the Program Mode of the C-Series modules? Anyone know if there is anything I should look for in my project file that might be responsible, or any settings on any other files or targets that might cause this.

Using LV2017 with the latest 2018 cRIO drivers for the cRIO-9048. Any driver bugs known about? Had to upgrade to the 2018 cRIO drivers to use that RIO - could that be the cause?

Yours desperately...

[stuartparkinson]

So, started again, creating a brand new project, added the RIO target, the FPGA and the C-Series modules. When I deployed, all was fine - all modules showed up as FPGA program mode in MAX.

Then went through adding all the rest of the project files and folders for the RT application and the FPGA application - all good.

Then added the Ethercat Master (which automatically added all the items discovered on the Ethercat bus). Deployed the project and BINGO! - All my C-Series modules in the main RIO chassis have now been changed to Real-Time Scan (IO Variables)

So adding the Ethercat modules has screwed up my RIO modules. I'm pretty sure its not supposed to. Any ideas on how to stop it doing this?

[stuartparkinson]

For debug purposes wrote a very simple fpga test vi that just looped writing to a channel on each module and checking for errors for each module. Removed the Ethercat master from my project, deployed, and ran the fpga test vi interactive. No errors, but if I go in to MAX and change the program type of one of the cards to RT Scan then that module shows an error on the fpga. When I set the program mode back to FPGA in MAX then the error goes away. So that is as expected, and shows I can change the prog mode on the fly in MAX and see the resulting errors come and go.

Then added the Ethercat master back into my project. All I have on the chain is one 9044 expansion chassis with 8 modules configured (by default) to use scan engine). Without changing anything, deployed the project and ran the fpga test vi interactive. All modules were throwing error 65673, and MAX showed all modules configured for RT scan. While running, in MAX, I could change each module back to FPGA mode and the errors disappeared.

Why does the deploy change my FPGA modules in the main RIO chassis?

How can I stop it doing this?

Or, if I can't, how can I set the prog mode on the fly programatically? (Surely this is possible if I can do it from MAX)

[Yin_W]

Hi,

I would recommend you contact National Instruments about this issue.  Contact your local applications engineer so NI can take a look at this further, as they can devote resources towards this issue. I believe this is not an easy problem that we can address by several ping-pong forum replies.

Thanks!

[abalma21]

Hello Stuart!

Is the RIO Programming Mode of the cRIO-9048 chassis configuration in your LabVIEW project set to LabVIEW FPGA Interface instead of Scan Mode?

Regards,

Gustave

[stuartparkinson]

Yes, it is set to FPGA mode.

[abalma21 · Accepted solution]

Hi Stuart,

You can try selecting the Module Programming Node as described in this Knowledge Base article.

Regards,

Gustave

[stuartparkinson]

@gustave21 Thanks a bunch, that did work and has got me going 😄

I guess this is a bug - surely not intended behavior - and the solution is a bit of a messy work around (you shouldn't have to set something programatically that is already specifically set in the project) - do you know where I can report it as such?

[abalma21]

Hello Stuart,

I am glad to know the Knowledge Base article I shared with you was helpful.

This issue has already been shared with NI R&D Team.

Warm Regards,

Alejandro Balma (gustave21)

Applications Engineering

National Instruments

[mjochinsen]

The article download link does not work or does not exist