DSP48E will not compile on sbRIO 9636

[JoeCanon]

I have a cRIO Dev board that is based on the sbRIO 9636.  I am trying to compile the example FIR filter as shown in the tutorial:

http://zone.ni.com/reference/en-XX/help/371599H-01/lvfpgahelp/fpga_dsp48e_filter/

The board has DSPs on it, but for some reason it will not compile.  Also, I tried the example program that says it can be run on the 9636, but it generates the same error as well.

Thanks,

Joe

[Esteban.R]

Hi JoeCanon

In order to find the source of the problem, I will like to ask you some questions

Do you get any error when you try to compile the code?

Are you trying to compile locally or remotely?

Could you send add a screenshot of the error?

Which version of LabVIEW are you using?

Which Operating systems do you have?

 Which version of LabVIEW FPGA are you using?

Regards

Esteban R.

[Donovan_B]

I think the project in Example Finder is incorrect in listing the devices that can run the example.  The one I found that sys it can run is DSP48E Semi-Parallel MACC FIR Filter.lvproj.  Is this the one you are trying to compile?

The sbRIO 9636 does have DSP blocks, but they are not the DSP48Es.  They are DSP48A1s.  The main difference as far as user implementation is concerned is that the DSP48A1 on the Spartan 6 target has an 18x18 multiplier, where the DSP48E on Virtex-5 devices have 25x18 multipliers.  Because the core is written specifically for the DSP48E, it will not compile on a Spartan 6 target.  If you want to explicitly use these DSPs on a Spartan 6, your best bet is likely the IP Integration Node.

[T-REX$]

To add on to what Donovan said, you can use the DSP48 macro from the Xilinx Coregen->Basic Elements Palette. This gives you a similar configuration experience to the default DSP48E(1) configuration node.

[JoeCanon]

Here is the weird part of this.  I can use the Xilinx LogiCORE primitives just fine.  For example, I made an averaging filter on the FPGA, and used the Xilinx LogiCORE accumulator.  I opened the dialog and there is a selection for using the fabric of DSP48.  I compiled the project, and it works like a champion!  The build report shows that I am utilizing 1 DSP48.  Maybe the macros don't link to the Spartan 6 FPGA, and the LogiCORE primitives do?  I also tried building a FIR filter using the HT code.  Most of the code was implemented on the DSPs as well.  Interesting, eh?