Does anyone have an example of a flexable(i.e. software configurable) DAQ system based on the cRIO hardware? The rate I need would be in excess of 500hz. The system must be able to detect and configure module changes as well as reconfigure modules without the need to recompile.
You won't be able to avoid recompiling completley, but what you can do is compile several different bitfiles ahead of time then programmatically load different bitfiles based off of what modules are in the cRIO. The module can be determined in the FPGA VI with FPGA IO Property nodes. Then in the host VI you can have a case structure where each case has a Open FPGA VI Reference with different bit files selected.
With regards to the DAQ and cRIO, cRIO is very different from cDAQ and DAQmx is not used when programming a cRIO. Your rates will be limited by the actual modules used in the chassis instead of the cRIO itself. Can you give an overview of what you are trying to accomplish, and maybe I can come up with some examples and suggestions.
Danny Funk -- Group Manager -- LabVIEW R&D -- National Instruments