I noticed I can access ReferenceClk10/Frontpanel IO in FlexRIO controller in FPGA (read only),But I'm not sure what kind of signal can I get from reading this port?
Will this give me a internal 10M ref clock data when I'm not wiring anything to this frontpanel IO? What's happens if i wired some other digital signal other then 10MClock in? Can I still use it as a Digital Input port?
Well, I did the test on FlexRIO controller, sadly even if I connected a low frequency digital signal in the REF CLK port, I will still read a high speed filping counting signal in VI, should be a internal 10M clock or something like this.