CVI RT read from FPGA DMA FIFO Speeds

[AlexAAuck]

Just out of curiosity, have you tried implementing the read by just polling an indicator from the FPGA rather than DMA'ing it? If you only need the most recent value, it doesn't make sense to construct a DMA, and that should reduce your read time.

[KavehV]

Yes, but I'm not sure what mechanism it uses to read/write to those indicators.  Doesn't that use DMA as well?