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Avoiding synchronisation pulse when outputting data from an NI 9260

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I've been fighting for few days with a cRIO equipped with a NI 9260 module for analog output. As I'm using it to drive piezoelectric actuators, I really must avoid any pulses, and I successfully cleaned up my code to get the output back to zero before exiting Data Mode. However, I still get a very short pulse when I'm starting Data Mode, of less than 0.2 ms but at least 0.5 V high.


After searching on NI database, I found out this seems to be a normal behaviour:

It says: "Wire a Boolean constant set to TRUE to the Startinput of the FPGA I/O Node to send a synchronization pulse to the module."


I would like to get rid of this, as this translates to a loud pop on my piezo actuator! Any suggestions on how to avoid this?


Thanks in advance for your help!

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Accepted by topic author Sendai-Jin

Hi Sendai-Jin,


Following the link and the information you have given, it seems like it is not possible to disable the glitch a the beginning of the Data Mode.


Here you can see in the Datasheet that it's a normal behavior and it can not be disabled.


If you have a customer number you can maybe contact the commercial service to identify which card is more suitable for your application.


Kind regards,



Message 2 of 3

Thanks a lot, Alexandre!

This is quite difficult to find such information, which happen to be critical in my case. Unfortunately, the NI-9260 is the only module for analog output with 24 bit resolution... I'm considering using a digital output and some electronic circuitry to switch the output signal on and off...

It's too bad also that we can't set the power-on and/or startup states on this module...

Thanks again,


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