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"Not enough memory to complete this operation" occurs, while generating intermediate files for my customized Ref FPGA of PXIe-5840

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Hello, 

[Background]

I am customizing Reference FPGA of PXIe-5840 and getting "Not enough memory to complete this operation" error. 

 

[Trouble Shooting]

This message is reproducible, even if I follow the steps below.  

  1. Save my VI and project
  2. Restart Computer
  3. Launch LabVIEW 2015 (My SW environment is as same as in PXIe-5840 Getting Started Guide)
  4. Right click on Build Specification which is for my customized Reference FPGA VI.  
  5. Generate Intermediate Files (not Build or Rebuild)

Windows OS is Windows 7 64bit.  From investigating task manager, LabVIEW 2015 seems to be granted about full 4GB memory from OS.  

I disabled Frac Deci / Frac Interpolator / MultiRec Engine.  On the other hand, due to a certain reason, I added another instance of Waveform Gen.  Disabling the three heavy-in-logic components might reduce quite a lots of resources, but just adding one more Waveform Gen instance causes this situation.  

 

[Questions]

Is there anything that I can do to use another instance of Waveform Gen?  (I must have another instance for it in addition to the original one for RFSG.)  I do not think it is helpful, but changing environment from 2015 to 2016 would help this situation?  

For a reference, I attach a screen shot at the moment of the message pops up.  

 

Best regards,

 

Osamu

Message 1 of 6
(6,837 Views)

Hi Osamu,

 

Modifying the FPGA extensions for the 5840 is unrecommended for about 1000 reasons. You have run into one of them. You should reach out to your seller about this issue you are running in to.

 

What is your end goal? Why are you trying to modify the FPGA? Our recommendation is to use a FlexRIO as a FPGA co-processor with your VST, then use Peer-to-peer streaming across the two.

 

Cheers,

 Michael

Michael Bilyk
Former NI Software Engineer (IT)
Message 2 of 6
(6,809 Views)

Have you been able to build it unchanged?


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
Message 3 of 6
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Hi Michael,  

 

Thanks much for your comment.  As far as I can tell, reference FPGA code itself is really well designed on top of lower IDL components.  I am so admired.  

 

I guess 5840 reference FPGA code has nothing to do with this memory full situation.  This situation stems from the LabVIEW FPGA compiler which currently seems to have some limitations of memory usages, when it generates a certain amount of intermediate files.

 

Buying additional FlexRIO as a co-processor would be a final option, and thanks again for your input.

 

regards,

 

 

Osamu

TRIONIX Inc.

CLED/CLA/CPI

NI's SDI product expert

 

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Message 4 of 6
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Hi Terry,

thanks much for your comment.  Yes, It successfully compiles with its original design.  I also checked success in compiles with enabling and disabling either or combinations of  interpolation / decimation/ multi record acq engine.  Also if I add some customizing codes, it compiles successfull.  

 

However, adding another instance of waveform gen seems to saturate the memory usages during intermediate file generation.  

 

While thinking to contact NI local support, I will make a simplified version of waveform gen on my own.  

 

Thanks for your input again and regards,

 

 

Osamu
TRIONIX Inc.
CLED/CLA/CPI
NI's SDI product expert

 

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Message 5 of 6
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Solution
Accepted by UMASO

Hi Osamu,

 

You should contact NI support or your sales representative to get you up and running with the FPGA Extensions.

 

Michael

Michael Bilyk
Former NI Software Engineer (IT)
Message 6 of 6
(6,778 Views)