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Synchronized CWS Generation on 5644R Using FPGA ( VSG/VSA Sample ) WITH PFIO TRigger

Hello Everyone,

                   for two weeks, I am trying to generate TWO CWS on Two 5644R. I got an example which is posted here, example is coded using instrument design libraries. I want to genrate triggers also, and implement it on FPGA. I need help if anyone of you can help in this application.I am currenlty trying to study VSA/VSG sample project 5644R but its FPGA programming is much diffecult. I want help in this application. I want to add a control which can control delay between two CWS. 

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Zarrar, there's no need to use the instrument design libraries for what you've described. You should be able to use RFSG exclusively. You've made multiple posts about this project. It's easier to respond and follow the discussion if there's only one post to track.

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