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park and inversepark transform take all the resoureces

Never done, and avoided as much as possible: lot of calculation required -> lot of space

Do you need to perform matrix inverse in the control loop (state feedback, etc...) ? If not, move it to the RT target and pass result to the FPGA if the evaluation is not time critical.

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Message 11 of 14
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Agreed. Primarily, I recommend that you take a look at reformulating the problem mathematically to eliminate the need for matrix inversion altogether (i.e. using a direct form solver). Matrix inversion can be numerically problematic.

If inversion is required, I recommend you perform the matrix inverse on the real-time processor and pass the inverted matrix to LabVIEW FPGA. Matrix inversions, even for a relatively small matrix like a 5x5, can be problematic in single-precision math because a single coefficient is multiplied by other coefficients many times resulting in accumulation of numerical error. Therefore, double precision math is strongly recommended for matrix inversions.

Here is a screenshot showing an example (from the open source Multisim circuit netlist to LabVIEW FPGA real-time SMPS circuit simulator project.) You can find the Inverse Matrix VI in LabVIEW RT/Windows by right-clicking on the block diagram and going to the Mathematics>Linear Algebra palette.

10-29-2015 9-54-25 AM.jpg

If you do have to perform the matrix inversion at FPGA speeds, the most likely way to implement it would be to do the 5x5 matrix inverse symbollically (using a computer algebra system such as Mathematica) and then implement the equations graphically in LabVIEW FPGA (using non-reentrant subVIs from the floating point algorithm engineering toolkit to share resources). Use IP Builder (a high level synthesis tool that's included with LabVIEW FPGA) to create an efficient FPGA implementation that meets your latency constraints. (See my post here for IP Builder examples by Brian_K.) Even then, you'll need to validate each solution against a double-precision floating point version executed on Windows or RT.

I hope this is helpful! Please keep us posted on your developments.

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Message 12 of 14
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Hi there,

I am using NI-myRIO1900 for single-phase Dynamic Voltage Restorer (Hardware implementation). Which contains an H-bridge voltage source inverter(VSI) with IGBTs triggering with SPWM (Sine-Triangle PWM) generation. For open loop operation, I could control the voltage of VSI by changing the amplitude of the Sine wave (Analog signal, Obtaining from grid directly) and thereby restoring the voltage to a specified value. But, now I am looking for a Closed-loop operation with the Park's & Clarke's Transformation. But, I could not see the proper blocks to implement my application. I have used RT program. (I have never used FPGA programing).

It would be great if you provide me a solution to my problem.

 

Thank you,

 

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Message 13 of 14
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Hi,

I strongly recommend to rely on the FPGA for these tasks. You must have very good reasons for still sticking to the RT part of your target... but perhaps the moment has arrived for you reconsider this. It really pays off.

For me it was very frustrating to face the limitations of e.g. RT timed loops, while, on the other hand, was surprised to see the power of FPGAs' single-cycled timed loops, and how many things the SGL datatype could do "down there"!

So basically I encourage you to get into FPGA programming.

Regards,

Biscay.

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Message 14 of 14
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