How long did you wait for the compilation to complete? It may take over an hour, depending on how full is the FPGA. The amount of time spent at each stage (i.e. translating) will vary and the compiler will take longer for some stages than others.
Keep in mind that the compiler is designing a custom digital control computer chip that executes your control code in a highly optimized manner. Synthesizing a custom computer chip is computationally intensive, but the end result is very powerful.
To minimize compiles, use the co-simulation capabilities of LabVIEW FPGA and Multisim to develop and test your code before compiling.
If you are getting a compilation error, under Reports, go to Configuration and determine your working directory. Go there, grab your compile report "XilinxLog.txt" and attach it to your reply. (To attach a file to a discussion thread do the following: Reply, click on Use advanced editor in the top right corner, and then use the Browse... button at the lower left corner to add an attachment.) You can also view your compile report during compilation by going to Reports>Xilinx log.
