Many engineers and scientists have used LabVIEW FPGA to access field-programmable gate array (FPGA) technology due to its abstracted nature and familiar graphical programming style. But engineers seeking to optimize performance or create multirate DSP applications must still think carefully about the underlying hardware during the design process. At this session, discover how high-level synthesis (HLS) technology offers increased FPGA programming abstraction alongside design optimization. Also explore models of computation for multirate FPGA applications, and how HLS can be used as a back-end compiler technology across models of computation.
Jeff Washington, National Instruments
