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implementing clock stretching using I2C with PXI as a master and STM32f407vgt as slave

I'm trying to implement clock stretching using PXI as the master nd stm32f407vgt as slave, The pattern file I use for my master, is it the same as the normal write pattern which is used for I2C write? or is there any specific changes required in the pattern file for clock stretching ?

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What PXI device are you using? NI-6570/1 digital pattern instrument?

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Applications Engineer | TME Systems
https://tmesystems.net/
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https://github.com/ZhiYang-Ong
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 wrote:

I'm trying to implement clock stretching using PXI as the master nd stm32f407vgt as slave, The pattern file I use for my master, is it the same as the normal write pattern which is used for I2C write? or is there any specific changes required in the pattern file for clock stretching ?


Unfortunately, the digital patterns in 657x are not advanced enough to implement clock stretching for the I2C master. What are you trying to achieve by doing this?

Santhosh
Soliton Technologies

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PXI chassis 1092 with 
NI DP 6571

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I just want to witness a proper clock stretching waveform, for testing purposes. I can see a slight stretch at the ADDR 9th bit(ack/nack) but the register address and data sent thereafter are all garbage, and I recieve a NACK for the addr 9th bit which no stretch is disabled, but transaction  continues with garbage values.

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If you just want to observe, why use 657x, you can get a microcontroller with I2C and an ADC with I2C clock stretching and observe the clock stretching in action.

Santhosh
Soliton Technologies

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I've done the board to board communication and it works, but I just wanted to try it using the PXI too

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