System design PXIe-8840 + PXIe-6341 + PXIe-7971R + PXIe5782

[charlie87]

Hello,

I have some experience with LV, LV FPGA and cRIO, however I am a little bit confused with the system design for PXIe. The components are: PXIe-8840 controller, Analog/Digital I/O module PXIe-6341, FPGA PXIe-7971R and dual I/O transceiver module for FPGA PXIe-5782

I measure and process the fast AI (sampling 250 MHz) in the FPGA where the control value is computed with the rate up to 1Mhz. I want to send the control value (0-5 Volts) to AO to PXIe-6341 to close the feedback.

I would like to know the best way how to do it.

I am not able to do it directly from the FPGA code. My idea is to read the FPGA output indicator in the HOST code running on PXIe Windows 10 and send it to the AO. But I do not believe it is the right solution...

[Terry_ALE]

What's your loop time from input to output?

[charlie87]

The process description may be useful:

There are laser pulses acting on the surface and its heat accumulation is measured by a detector. The rate of the laser pulses is fixed and can be set in a range up to 1 Mhz. The moving average heat accumulation is computed in the FPGA. It is required to control the energy of the laser pulses to maintain the mean value of heat accumulation. The all process takes a few miliseconds.

The control loop rate depends on the laser pulse rate. I think that the control loop rate may be a few time less than the rate of the laser pulses

[Terry_ALE]

Seems like there is a non-RT operating system in the loop.  This will prevent deterministic functionality.

[charlie87]

You are right, threre is no RT system intalled on the PXI controller, only the RT save mode. I have found that the RT OS can be installed on the PXI Link and it can be sweetched between WinOS and RT OS. In RT OS Then the timed loop rate can be 1 Mhz Link .

My idea is to read the FPGA output indicator in the 1 MHz timed loop in RT, calculate the control value and command the AO in the PXIe 6341.

Do you agree with the idea ?

[Terry_ALE]

Reading an FPGA indicator on the Host (RT in this case) is always lossy with a non-deterministic latency in the single digit microseconds (not sure if the upper bound of this goes into the 10s of microseconds).  Not sure if this will be a problem in this application.

I have no RT on PXI experience and cannot comment about that.

[charlie87]

Thank you for the info about the latency of FPGA indicator reading in the RT. I have to consider the consequences.

I suppose, there is not better choise ...

[santo_13]

Would going with a complete FPGA based approach work for you?

There are many R-series multifunctional RIO cards that have both AI, AO and DIO, allowing you to implement the whole control loop on the FPGA.

https://www.ni.com/en-us/support/documentation/supplemental/06/ni-r-series-multifunction-rio-frequen...

[charlie87]

If I have another R-series FPGA card with right I/O range, I would need to send the control value from PXIe-7971R to it. How can it be done ?

[santo_13]

You can leverage the P2P technique to share data between RIO cards without going through the host.

https://zone.ni.com/reference/en-XX/help/372831C-01/p2pstreamhelp/p2plv_topo_fpga2fpga/

https://www.ni.com/en-us/support/documentation/supplemental/10/an-introduction-to-peer-to-peer-strea...

I don't have experience with this concept but have heard people use this to transfer data between RIO instruments at high rates without involving the host.