Hi there guys,
I'm currently researching the possibilities of 6571 for the use in various RAM testing for a non-commerce University research project. I had success with writing and reading from the SRAM on various frequencies, even the Shmoo was doing a good job.
I'd like to ask a favor if some can share a idea how to implement standard r/w RAM test's in the Digital Pattern Editor (DPE). Those test could be: ZERO-ONE, CHEKERBOARD, and GALPAT. Please refer to the photos in the attachment.
The main issue for me is how to set the DPE automatically scan through a set of addresses in the available address space, i.e. from 0x0000 to 0xFFFF.?
If any additional description of what I'm trying to achieve is necessary to clarify this topic please feel free to ask.
Solved! Go to Solution.
I don't think there is any feature on 6571 that would do that for you.
I would recommend creating a utility that does the following,
You've to do this only once, so no dynamic generation is required.
In my experience, I typically get these checkerboard patterns generated using the VLSI design/verification tools like Cadence and use utilities to covert them from industry-standard pattern formats (WGL, STIL) into digipat.
You can also look into third-party tools to make it easy for you - https://www.ni.com/en-us/support/documentation/supplemental/16/supported-pattern-conversion-tools-wi...