PXI Data transfer between RTOS and FPGA

[Jagwa00]

Hi,

I have a DAQ card in my PXI as well as a 7813R FPGA card.

The problem is that I need to send the sampled waaveforms from the DAQ card to the FPGA card (which only has digital IO) in order to run my control on the FPGA. When I generate a 50Hz sinewave on the RTOS to simulate a measured signal and send it to the FPGA via front panel controls (http://zone.ni.com/reference/en-XX/help/371599G-01/lvfpgaconcepts/pfi_data_transfer/) the signal that arrives on the fpga is alot slower than 50Hz indicating that aliasing is occurring (it is taking too long to send the data). I tried to use this method of transferring data because my control only requires the latest data but it also has a phase lock loop which requires the arriving data to at least look like the original signal. Another criteria is that the control needs the most up to date data possible. I know there is another option of using DMA FIFO but I didnt use it because I thought it would take longer to send the data because every value needs to be sent.

My questions are:

Am I going about this the correct way? I know there are FPGA cards with Analog inputs. The reason I didnt buy one is because I have a large amount of differential Analog inputs (20+)

Is there a fast way of transferring the data to the FPGA. (I convert all data to FXP before writing to the FPGA)

[Branch_Support-NIC]

Disregard this post

[Eric-M]

Hi Jagwa,

Can you explain a little bit more about what you are trying to accomplish with this.  I believe that DMA FIFO is actually going to be your best option, but I would need to know a bit more about what you are trying to accomplish with this to help show why.  A couple of things beyond the general application that would be good to know are:

1. Is the FXP that you are sending down through Read/Write Control an array of datapoints for the sinewave or a single value?

2. What kind of timing control do you have on the FPGA to try and use the sinewave information at 50Hz?

          -Sending a 50Hz sinewave down does not mean that it will use the information at that rate.  It is essentially just a set of data points that it will run through, so some sort of timing needs to be included to run through the datapoints to make it a 50Hz signal.

          -If you are sending data from RT to FPGA, there should not be aliasing on the FPGA because it will generally be running much faster than the RT system, so it should easily capture all datapoint values.  My guess is that you are trying to read in all datapoint values in a loop to capture the whole sinewave and are reading in some values multiple times, so you never read in the full signal, but without more information this is just a guess.

The answers to these questions and general scope of application will help a little bit more to see if we can get you in the right direction.

[Jagwa00]

Hi Eric, Thank you so much for the reply.

My application is control of a 3 phase inverter connected to the grid. I measure the voltages and currents with the daq card and this is done on the RTOS. I then send the data to the fpga where all the control and pwm generation is done.

"1. Is the FXP that you are sending down through Read/Write Control an array of datapoints for the sinewave or a single value?"

I am sending single values

"2. What kind of timing control do you have on the FPGA to try and use the sinewave information at 50Hz?

          -Sending a 50Hz sinewave down does not mean that it will use the information at that rate.  It is essentially just a set of data points that it will run through, so some sort of timing needs to be included to run through the datapoints to make it a 50Hz signal."

I think you have hit the nail on the head there! The data that is being received on the fpga in a while loop where I use the softmotion PLL and  other control blocks. Should I be synchronizing the loop where the data is being acquired in and written to the fpga (RTOS) and the FPGA loop which receives and processes the data?

          "-If you are sending data from RT to FPGA, there should not be aliasing on the FPGA because it will generally be running much faster than the RT system, so it should easily capture all datapoint values.  My guess is that you are trying to read in all datapoint values in a loop to capture the whole sinewave and are reading in some values multiple times, so you never read in the full signal, but without more information this is just a guess."

Makes a bit more sense now.

Thank you very much, I am still fairly new to the system so I am learning all the practicalities.

[Eric-M · Accepted solution]

Hi Jagwa,

You should not have to synchronize the RTOS loop that is writing the information and the FPGA VI that is reading it.  Instead, you can just use a FIFO.  In RT, you can write all of the data points to the FIFO, and then you can pull them out one at a time on the FPGA VI and use them as needed for control features.  This way, the only timing that you need to worry about is timing the FPGA VI to pull out data to mimic 50 Hz.

Regards,