PXI_CLK10

[Dr K]

I just added a PXI-6653 to my PXI-1011 chassis, in slot 2, and am trying to replace the native 10 MHz backplane PXI_CLK10 with the high precision OCXO one in the '6653. The objective is to provide a divided (by factors of 2) reference clock, that has the precision of the OCXO. I am running this in LV 7.1, NI-MAX 4.5 etc.

The vi attached first connects OCXO to PXI_CLK10_IN, thus replacing the native clock with this precision one. That part came from "NI-SYNC Route Clock.vi"

Then, from "NI-SYNC Generate DDS Signal, Divide and Route.vi" the DDS takes the precise PXI_CLK10 from the backplane, and brings it to CLKOUT at full frequency, as well as a lower frequency that is divided by factors of two, to the PFI0 prt.

The problem is that when I measuring the full frequency clock at CLKOUT, it has the (lack of precise) frequency of the native backplane clock, or about +/-4 to 5 ppm. I actually calibrated my fequency counter  by porting the OCXO out CLKOUT with the first vi, and it is calibrated to +/- 0.5 ppm now.

Could my problem be compatibility issues with the PXI-1011 chassis? I read in another thread about someone with a PXI-1033, that had to set switch S1. I can't find any S1 or other config switches on this chassis.

Anyone had similar experiences with the PXI-6653 and older chassis?

Thanks in advance for your comments,

Kurt

[pflores]

Dr. K,

I would recommend trying to route the PXI_CLK10 directly to CLK_OUT. Using this route alone should get you the original PXI clock. If you also route the OCXO to PXI_CLK10_IN, you should now be able to verify the more accurate clock. This is eliminating the DDS from the picture. Do you see the increase in accuracy? If not, the clocs are not routing as they should and it may be a chassis problem. If you do see an increase in the clock accuracy, then the routing is working as it should and we can further esplore the DDS side of things.

Let me know what happens.

Regards,

[Dr K · Accepted solution]

Peter,

Thank you for having a look at this. Yes, originally I ported OCXO to CLK_OUT, using NI-SYNC Route Clock.vi, and adjusted the cal on the B&K (it has only a 7-1/2 digit precision) for 10 MHz. This would serve as a basis for determining whether I was successful in replacing the native chassis PXI_CLK10 with the more precise OCXO.

The fact that the attached vi gave a PXI_CLK10 that read 10.00008 MHz at CLK_OUT suggests that my chassis is unable to accept the OCXO on the PXI_CLK10_IN line. Refering to the manual for the PXI-1011 chassis, under Section 1, "System Reference Clock," it lacks the verbiage that I should be able to do this. Other chassis, such as the '1000/B, '1042 and even the '1010 have verbiage that PXI_CLK10_IN line can be driven by an external source. So, I suspect that a chassis upgrade is in my future.

Thanks again for the reality check!

Kurt

[bchang32]

Hi, Sorry to open a dead thread, but when I try this (routing PXI_CLK10 to CLK_OUT and OCXO to PXI_CLK10_IN), I get a error of the following: Driver Status:  (Hex 0xBFFF0042) The specified destination terminal is in use.

Is there any way around this? I'm also using the 6674T timing module instead.