PXI-6541 Trigger Interrupt

[AidanFrost]

Hello,

I'm using the PXI6541 to perform a simple digital output based on an interrupt input.

As seen in the attached diagram I drew up, I want one of the PXI's trigger lines to listen for a falling edge from my hardware.

Once the CONVST falling edge occurs, I want to wait x ns before I set one of the DIO pins (EN) to go high until CONVST goes high.

I've been modifying the HSDIO "Dynamic Generation of Multiple Waveforms" example VI in LabVIEW, trying to add triggering to it. (See attached VI). 

My problem is that it doesn't appear to wait for a trigger, but instead times out after a number of seconds. I've attached my modified VI to this post.

Also, what happens if I do not enable "Voltage Configuration"? What's the logic level it will work at by default?

Many thanks in advance.

[AidanFrost]

Just wondering if anyone could assist with this?

[QiongW]

Hi,

The VI you posted doesn't store any setting info in it. All the settings are default, 

If you could let us know your settings that would be really helpful.  There are two ways doing that, you could either send us a screenshot of your front panel VI, or you could, in the front panel, Ctrl+A to select all, and then Edit--> make current value default. then save the VI and post that VI again.

You mentioned that you want to use PXI's trigger lines, do you mean PXI Trigger Linex/RTSIx? If your hardware is not in the chassis, it would be best to trigger using the SMB PFI line on the front panel of 6541. Just need more clarity on that.

If you do not enable "Voltage Configuration", the default voltage level should be 3.3V Logic

[mudson]

Hello Aidan,

How many nS are we talking about here?  

With a maximum clock rate of 50MHz, that may be difficult to achieve with any repeatability.

Best regards.

[JamesKent]

Hi,

Is it possible for the wait x nanoseconds, could you generate a waveform with 0's at the start to emulate the results you are trying to achieve. As mentioned above, the maximum resolution you can achieve with the systems clock rate is 20 nS, so you should take this into consideration.

Best Regards,

[AidanFrost]

Hi guys,

To answer each of your questions in turn.

Regarding the trigger lines, what is the difference between say PFI 0 and PXI Trigger Line 0/RTSI 0? I had been using the latter pin from the breakout cable. The hardware I am testing is just a bench top eval board for the part. I hadn't realised there was access to PFI 0 via the SMB connectors.

Regarding timing, I require a minimum of 15ns, so a 20ns interval would be fine for this. The constraint is to allow the part time to wakeup and setup, so having it slightly longer is ok.

Hope this clarifies the questions.

[QiongW]

So PFI0 is the SMB connector on the front panel. If you have a SMB cable to hook the connector to your device, it should work.

The breakout cable has PFI 1-3, so you could also select them in the VI and use cable. Check NI Digital Waveform Generator/Analyzer Getting Started Guide http://www.ni.com/pdf/manuals/373308m.pdf  pg23 for correct pin you want to use. For example, PFI 1 is pin 26, so in your VI, select PFI 1 for Source, and connect cable pin26 to your device.

PXI Trigger Line 0/RTSI 0 is the trigger line in the backplane of the chassis. It is useful for trigger event between multiple PXI boards in the same chassis.