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Missing early samples using Tclk Digitizer and Function Generator

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Hi,

 

I have a pxi 5922, an arbitrary waveform generator 5412. They are in sync due to Tclk. The issue I have is that  I can't capture the start of the function generators output. I have tried different reference positions for the scope, but am unable to shift it to the start.

 

I have tried having both the function generator and digitizer as the master, this does not appear to help my issue.

 

Is there something else I could try to capture the start of the func gen output while using Tclk.

 

Cheers,

Brett 

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Hi Brett,

 

One question I have is why you're using TClk to sync these devices' generation/acquisition if you're looping the generation back in. The easiest way to check the output of your signal, is with a single or multi record acquisition with pre trigger samples on the 5922 where you trigger off the signal you are generating with the 5412. This would ensure that you acquire the entire signal. Another option would be to just use the PXI_Clk10 on the chassis backplane as a reference clock on both devices so that they are atleast phase synched and then start the digitizer just before you start the 5412. 

 

The tricky thing here is that you are basically trying to acquire a signal at exactly the same point in time that you are generating it, so you are looking at some inevitable propagation delay in your cabling. That is why I am curious why you've chosen to TClk your devices.

 

The other thing you can try is to set a Sample Clock delay in the TClk session for the 5412. You can add a delay between -1 and 1 sample clock period. Here's an image of the property node that you use to configure that.

 

TClk Delay.gif

There is also a bit more information on this property if you check out the help menu on it (Ctrl+H and mouse over the property). I hope this helps out.

 

Chris W

Message Edited by Chris W. on 07-17-2009 12:05 PM
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Hi Chris,

 

The reason I am using Tclk is because there is to much variation in the phase response between runs when using the PXI backplane as a reference clock and sharing a trigger. Tclk makes the phase measurement more repeatable between multiple runs. Phase is very important for my application because all calculations are based on it. 

 

There is propagation delay in the cable, but I don't think that is the cause. I have set the system up to generate and acquire 50k samples at a rate of 500Ks/s. I have noticed that the 5922 is missing 61 samples. This is when the 5412 is wired directly to the 5922 with a cable shorter than 0.5m.

 

I have yet to try setting a sample clock delay for the 5412 TClk session, but will let you know how it goes.

 

Brett 

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Hi Brett,

 

I have a couple questions for you about your setup. First, which one of the devices is actually recieving a trigger? and what sort of a trigger is being set up? Also, is the digitizer being configured for a reference trigger or a start trigger? That could change things.

 

The other thing I was wondering is where the 61 samples that you are missing are coming from? Are they at the end of the signal acquisition or the beginning? And are both cards sampling at the same rate?

 

Chris W

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Hi Chris,

 

The trigger is being received by the function generator on PFI 0 as a digital start trigger. Tclk is handling the triggering of the digitizer for me. When I run the digitizer as the master device and trigger it with the analogue input trigger, I can only select reference trigger not start trigger.

 

The digitizer is missing the first 61 samples generated by the function generator. So the digitizer starts capturing from sample 62 but still captures the required 50K of samples.

 

Both devices are running at 500KS/s and both devices are generating/acquiring 50K samples.

 

Brett 

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Is there another scope that you can check this on, it doesnt make sense that your digitizer would read 50K samples if it starts 62 samples behind and the FGen is only generating 50K samples.  It could read in 50K samples with a constant voltage at the end of the waveform of 61 samples after the FGen has stopped generating.
Doug Farrell
Solutions Marketing - Automotive
National Instruments

National Instruments Automotive Solutions
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Thats exactly what is happening. The digitizer is starting 62 samples behind the Fgen. It does take the full 50K samples.

 

My issue is that I need to capture the start of the Fgen.

 

 

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Beej,

 

Could you please post some pictures of the waveform you are outputting and waveform your scope is capturing.  The scope, if it is acquiring 50K samples should have 62 samples of DC value at the end because the fgen has stopped outputting.

Doug Farrell
Solutions Marketing - Automotive
National Instruments

National Instruments Automotive Solutions
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It does have 62 samples of a DC value, The DC value is whatever the amplitude of the last sample from the waveform I was outputting.

 

I understand I am acquiring the requested 50K of samples on the Digitizer. I just want to ensure the digitizer captures sample 0-49,999 output by the function generator. 

Message Edited by Brett J on 08-05-2009 08:38 AM
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Solution
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So, the 5922 has a delta sigma converter on it which will cause a sample delay when synchronizing with other cards, the same as our DSA cards.  This is the sample delay we are seeing and there is nothing synchronizy we can do to get rid of it.  What I would recommend is to generate 62 "junk" samples at the beggining of your waveform.

Doug Farrell
Solutions Marketing - Automotive
National Instruments

National Instruments Automotive Solutions
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