The PXIe-6570/6571 Digital Pattern instruments should have an option for a Halt On Failure mode. This can save test time when a large pattern burst fails a vector early in the pattern. This is a common feature in other semiconductor ATE.
Thanks for your suggestion. I am the product planner for this product which means I own the roadmap and work closely with R&D and customers to define and prioritize features. I have added this to our feature backlog for future releases. We haven't prioritized what will come after our 19.0 release, but we will definitely estimate this effort and do our best to get it in a future release. We appreciate your feedback.
