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Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

Hello Circuit Designers,

I would like to share with you some thoughts on the challenges the NI design solution helps engineers to overcome in the Clean Energy domain, specifically, the challenges of bringing the worlds of analog and digital circuits together. The earlier the system dynamics and the complex interactions between analog circuitry and digital code are predicted, the more efficient and powerful the design strategy becomes. This early interaction is what NI simulation and prototyping tools of NI Multisim, NI LabVIEW, and NI embedded RIO platforms tries to accomplish for designers.

The variable time-step co-simulation between Multisim and LabVIEW of closed loop systems accounts for important behaviors that are essential in judging the overall system performance including non-linearities, resonances, and harmonics very early in the design stage. Moreover, the design solution is completed by combining simulation tools with integrated hardware implementation  tying the analog world to FPGA platofrms.

Download Multisim 12 and LabVIEW 2011 and let me know what you think.

Mahmoud W

National Instruments

Message 1 of 21
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Re: Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

Hello Mahmoud W,
I have both Multisim 12 and LaBVIEW 2011 installed on my laptop and when trying to connect between them like in this tutorial:

http://www.ni.com/white-paper/13663/en
I did every thing correctly and tried it more a lot of times but each time, this error appears to me

________________________________________________

Error -2367 occurred at External Model

Possible reason(s):

Control Design and Simulation:  The shared library corresponding to the external model returned an error.

Unable to load library.

____________________________________________________

and here is a screenshot for the error message :

Configuration Error.png

I hope you can help me

Thanks in advance

Ahmed Elsayed

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Message 2 of 21
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Re: Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

Hi Ahmed,

You need the LabVIEW 2011 Control Design and Simulation Module installed to run Multisim and LabVIEW co-simulation projects.

Let me know if you have any questions,

Mahmoud

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Message 3 of 21
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Re: Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

Thanks for your reply,
I already have CDS Module, The problem is solved now

This cause the problem:

I installed Multisim 12 and LabVIEW was runing and i should restart it for the multisim design to be loaded in labview.
and the error is due to a different model than the multisim one.
btw, this connection between LabVIEW and Multisim is very useful and will solve a lot of problems for me as a Control Engineer.

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Message 4 of 21
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Re: Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

Hello mahmoud,

Everytime i try to do a simulation i have a problem related to Timestep !
here is a screenshot for the error:

Timestep Error.png

When i tried to change the parameters of the control and Simulation loop, it gives me different results either a very slow simulation with bad response or a very fast one and finished in very short time.

so could you provide me with a proper method to configure it well.
thanks in advance

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Message 5 of 21
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Re: Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

hi Mahmoud,

I too face the same problem which Mr. Ahmed is facing. the shared library corresponding to the external model returned an error. Do analyses : Timestep too small.

lv multisim co simulation error.png

I have LabVIEW 2012 version and Multisim 12.0.1 installed.

Thanks in advance

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Message 6 of 21
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Re: Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

I also have the exact same problem. It is really holding me back. The program worked initially but when i changed the values it gave the error. I changed back to the original values and it now still gives the error. So confused. Also how can a timestep be too small if I increase it?

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Message 7 of 21
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Re: Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

I am also facing same problem. could you please tell me how to overcome it?

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Message 8 of 21
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Re: Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

Hello everyone,

The Do Analyses error in cosimulation, is an error indicating a problem in the Multisim circuit file. It could be an error such as a floating node, an improperly grounded circuit, or a misplaced source on the schematic. It could also be an error in the SPICE transient simulation setup.

I can not really tell why you are getting this error unless I get your Multisim and LabVIEW files. Please feel free to send them to me, or to upload them to the Multisim support forum here: http://forums.ni.com/t5/Circuit-Design-Suite-Multisim/bd-p/370

Here are screenshots of the errors I mentioned. Please give us some more information about the designs and we'll make sure your co-simulation is up and running.

Misgrounded circuit:

1.png

Floating co-simulation port:

2.png

Misplaced source:

3.png

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Message 9 of 21
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Re: Multisim and LabVIEW Variable Time-step Simulation Fills Big Gaps in Analog/Digital System Design

Thank you for your reply. just i have tried to construct an inverter circuit in multisim by using IGBT.  And i have generated a square wave in labview and given as a gate signal to IGBT. i have attached the images here. Kindly help me to solve this problem.

1phase.png

labview.png

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Message 10 of 21
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