I'm VeriStand newbie and my NI training is yet to come in march, so right now I'm a bit in trial and error mode!
I'm having a PXI7842R that I want to run with VeriStand 2015SP1.
The RIO datasheet shows, that the 7842 has Digital IO and Analog IO located on connector 0, where I hooked up a SCB-68 with a RMIO cable to connect my peripherals.
I have selected the PXI-7842R Analog, PWM, Digital Lines.fpgaconfig but unfortunately, I cannot access the DIOs on connector 0, only the DIOs on connector 1.
That's not suitable for me, since I need DIOs, AnalogOut and AnalogIn. According to the datasheet, these should be available on Connector0 and hence on the SCB-68 box.
1. What's the reason for this constraint? Are there any combinatorial restrictions on the selection and combinations of IOs?
2. Is the fpgaconfig just an arbitrarily chosen combination of IOs? Can I custom build my own fpgaconfig tailored to my specific needs?
3. Is tailoring an fpgaconfig a very advanced task? I'm a very advanced LabVIEW user, but have no experience on VeriStand and FPGA so far.
4. Is it a more straight forward workaround to just use a second SCB-68 box and hook up on Connector0 AND Connector1?
Thank you and best regards
You're correct in saying that the 7842R has DIO lines available on connector 0. To address your questions:
1. This is down to how the 'template'/existing fpgaconfig (and bitfile) is configured. This uses the DIO lines on connector 0 for the PWM, rather than direct access to the DIO line.
2. Yes. This is an example of how to interface with this particular FPGA card using VeriStand. You can create your own (see below).
3. There's actually two parts to this - the .fpgcconfig (xml) file you see which defines the interface from the FPGA to VeriStand and the .lvbitx file which actually defines the FPGA 'personality'. The .lvbitx file is referenced within the .fpgaconfig file. There's some tools which will assist you in creating custom personalities and .fpga configs available which I'll reference below.
4. If you already have one, then it'll certainly work. Whether or not it's the best option will be down to the LabVIEW experience you have to create new FPGA personalities as well as if you'll end up needing the skills in the future. It'll likely be the quickest though.
NI VeriStand FPGA-Based I/O Interface Tools: This provides you with a template for the LabVIEW code required for creating a custom FPGA personality that's interfaced with VeriStand.
FPGA XML Builder Node: This tools allows you to easily create an fpgaconfig (xml) file for the personality you create using the above tool.
Both tools are well documented and used regulary when using FPGAs with VeriStand.
I hope this answers your questions, but let me know if anything is unclear or you need any more info!
thank you for your reply that clarifies my questions completely.
It's a 100% confirmation of my theory. I've already thought, that the assignment of IOs from a certain port is configurable by the FPGA personality. I just wanted to make sure, that I haven't miss any obscure option or checkbox within VeriStand!
Due to deadline constraints and my little knowledge of that topic, I have opted for a second box and hooked up my Digital IO on Connector1. That's fair enough for me.
As soon as I have time and my training I will go for a custom built FPGA personality. That'll be cool;-)
Best regards to you