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Running a PID loop at high speed (100hz+) ?

Running a PID loop at high speed (100hz+) ?

I'm using veristand and a PXI chassis to control and datalog an engine in a dynamometer cell. I currently command a desired speed setpoint (0-10v analog signal) to the drive's input and it's own PID controls to that.  The drive also has an option of direct current control which allows for much faster operation, but requires external control loops for speed.

I have a counter in working to the PXI chassis that gives me shaft speed. Everything runs at 10hz, I've tried going faster (30hz) and start getting errors related to speed.

I have successfully created desired speed profiles in .csv files and had veristand follow them, but the drive lags badly due to the way it's PID is set up. The speed setpoint PID in the drive is not configurable.

 

"What I want to do"

I want to change to current control in the drive and use a PID loop in Veristand to control the speed. PID like this:

SETPOINT: Desired speed in RPM as a numeric control

FEEDBACK: Speed from a counter channel at 1000 ppr

OUTPUT: analog voltage output 0-10vdc

 

From what I have been told, the minimum speed that the PID loop needs to run to successfully do this is 100hz, faster is better, 10hz won't work.

 

I'm using the control add on for some temperature control channels and that's clunky, but works for slow channels. (downloaded from here: https://github.com/NIVeriStandAdd-Ons/Control-Custom-Device)

 

I must admit it's a bit of a surprise that Veristand requires a custom device for PID control.

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Message 1 of 14
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Re: Running a PID loop at high speed (100hz+) ?

Yes, NI VeriStand doesn't have PID feature on its own.

In my experience, most user implement the feature in Simulink model....

 

I find another CD, have you tried this one?

NI VeriStand Add-on: PID Models

 

My another suggestion is to develop CD by yourself.

Following document is good manual for CD developer. This is written in English : D

NI VeriStand カスタムデバイス開発マニュアル

Emboar
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Re: Running a PID loop at high speed (100hz+) ?

Or develop FPGA personality...?

Emboar
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Re: Running a PID loop at high speed (100hz+) ?

I tried using that simulation model and actually prefer it in some ways because you can tune the pid gains on the fly. However unless I'm missing something it still runs at the 10hz rate.

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Re: Running a PID loop at high speed (100hz+) ?

The model was large...? If so, the rate would be around 10Hz.

How much jitter can you allow?

Emboar
Certified LabVIEW Developer
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Re: Running a PID loop at high speed (100hz+) ?

You can definitely do this.  We run PID loops at 1000Hz for control all the time.  The PID controls are VI's we write and compile into VS models then import them into the project.  Your project must be set to run at 1000 Hz to get the model to run at that speed. Your feed back speed will be the limiting factor for your PID control, but the counter should be fast enough.  If you have temperatures they run really slow and may cause issues.  I don't know your HW config so I can't comment.  We have used the 9813R FPGA with CRIO modules and written custom FPGA code that separated out the T/C from the rest of the I/O since the T/C update is so slow. 

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Re: Running a PID loop at high speed (100hz+) ?

I'm running a PXI chassis with quite a few analog in's and temperatures:

1078

4353

4353

6143

6225

6722

8513

8430/8

 

If I try to set the Target Rate above 90Hz, veristand errors during deployment because the TC input cards can't handle a rate above 90Hz. At least I think I'm interpreting the error correctly. I'm guessing I need to find a way to run certain parts of the system at different speeds?

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Re: Running a PID loop at high speed (100hz+) ?

Hi Larboc, 

 

Can you attach a screenshot of the error or the error message and code that you are seeing just so we can see it to and maybe provide some additional input? 

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Re: Running a PID loop at high speed (100hz+) ?


@MauraW wrote:

Hi Larboc, 

 

Can you attach a screenshot of the error or the error message and code that you are seeing just so we can see it to and maybe provide some additional input? 


Here is the log file of the error, hopefully more useful than a screenshot. I deleted every unused channel and it made no difference, same error:

"

System Definition file: E:\DATA\LDC\Veristand Config\APS Cell LDC 10trim.nivssdf
• Initializing TCP subsystem...
• Starting TCP Loops...
• Connection established with target Controller.
• Preparing to synchronize with targets...
• Querying the active System Definition file from the targets...
• Stopping TCP loops.
Waiting for TCP loops to shut down...
• TCP loops shut down successfully.
• Unloading System Definition file...
• Connection with target Controller has been lost.
• Start Date: 8/6/2018 9:56 AM
• Loading System Definition file: E:\DATA\LDC\Veristand Config\APS Cell LDC 10trim.nivssdf
• Preparing to deploy the System Definition to the targets...
• Compiling the System Definition file...
• Initializing TCP subsystem...
• Starting TCP Loops...
• Connection established with target Controller.
• Sending reset command to all targets...
• Preparing to deploy files to the targets...
• Starting download for target Controller...
• Opening WebDAV session to IP 192.168.1.100...
• Processing Action on Deploy VIs...
• Deploying XNET database: Cummins6
• Deploying XNET database: Bosch_CAN55
• Gathering target dependency files...
• Downloading APS Cell LDC 10trim.nivssdf [451 kB] (file 1 of 4)
• Downloading APS Cell LDC 10trim_Controller.nivsdat [642 kB] (file 2 of 4)
• Downloading CalibrationData.nivscal [0 kB] (file 3 of 4)
• Downloading APS Cell LDC 10trim_Controller.nivsparam [0 kB] (file 4 of 4)
• Closing WebDAV session...
• Files successfully deployed to the targets.
• Starting deployment group 1...
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
The VeriStand Gateway encountered an error while deploying the System Definition file.

Details:
Error -200077 occurred at Project Window.lvlibSmiley Tongueroject Window.vi >> Project Window.lvlib:Command Loop.vi >> NI_VS Workspace ExecutionAPI.lvlib:NI VeriStand - Connect to System.vi

Possible reason(s):

Requested value is not a supported value for this property. The property value may be invalid because it conflicts with another property.
=========================
NI VeriStand: Property Node DAQmx Timing (arg 5) in DAQmx Timing (Sample Clock).vi:4730002->DAQ Engine.lvlib:AIAO DAQ Master Set Timing and Source.vi->DAQ Engine.lvlibSmiley Very HappyAQ Set Timing and Source.vi->DAQ Engine.lvlibSmiley Very HappyAQ_Init Devices.vi->NI VeriStand Engine.lvlib:Initialize DAQ Data.vi->NI VeriStand Engine.lvlib:VeriStand Engine State Machine.vi->NI VeriStand Engine.lvlib:VeriStand Engine.vi->NI VeriStand Engine.lvlib:VeriStand Engine Wrapper (RT).vi <append>
Property: SampClk.Rate
Requested Value: 100.0
Maximum Value: 90.000009
Minimum Value: 22.250739e-309

Task Name: PXI1Slot2_AI

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
• Sending reset command to all targets...
• Stopping TCP loops.
Waiting for TCP loops to shut down...
• TCP loops shut down successfully.
• Unloading System Definition file...
• Connection with target Controller has been lost.

"

 

 

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Re: Running a PID loop at high speed (100hz+) ?

Hi larboc,

 

It does look like the limiting factor here is going to be the disconnect between the PCL loop rate that you want for the PID custom device and the limitation of the DAQ device.

 

To discuss a little further here are the list of execution steps that the PCL takes and you'll see that step 3 is going to be Read Data from HW

 

List of PCL Execution Steps
http://zone.ni.com/reference/en-XX/help/372846G-01/veristand/pcl_execution/

 

So if we set the PCL rate to something that the HW does not support then we will run into the issue that you are seeing.

 

Have you tried running the PLC at 90Hz instead of 100? Is the data unusable for your application? I am not sure if you are going to be able to get around the 90Hz limitation with the hardware that is being used.

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