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Mapping IO under VeriStand

I have a chassis with both a 6259 and 6255 board.  I know the IO count for each... example, 6259 has 32 AI, 4 AO and 48 Digital.  My question is, when I add the DAQ device under Veristand, how do I map the digitals?  The Create DAQ Device simply states #DI, #DO.  I need to say which of these Digital are DI and which are DO and their connector pins. This is because we are retrofitting an existing device with a preexisting harness.  Below is an example of what I mean.  How is it I map PO.17 to an output and PO.16 to an input? 

 

Connector 1 6259 10 P0.17
OUTPUT NI DYNO FWD/REV DYNO DIRECTION SELECTOR 0,5 0=FORWARD
1=REVERSE



Connector 1 6259 11 P0.16
INPUT PANEL DYNO START PANEL REQUEST TO START DYNO 0,5 0=NO ACTION
1=START



 

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Message 1 of 5
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Once you have created the # IOs that you want to use, navigate to each page and update the digital line.

Right now there is no way to specify the direction of the digital line at the time of creation.

Since you have mixed directions instead of the first group is incoming and the second group outgoing, I suggest to create the digital lines based on their direction one after the other.

For example: line 0..3 -> input; line 4&5 -> output; line 6&7 -> input

Create 3 digital Input lines, afterward relaunch the dialog (right click on the DAQ device -> Add channels) and add 2 more DO, afterward launch it again and add 2 more DI

 

We hope that we can provide a more convenient way of doing this rather sooner than later!

 

 

Thanks,

Tom

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Hi Tom-

A couple issues with that... I have tried doing that: P0.0..1 -> Output, P0.2..4 -> Input, etc.  When I deploy to target, there's a runtime error -200587 (digital lines are reserved or not present).  Also, under VeriStand, it seems there's an issue remapping DI's and DO's.  Example, add 16 DI to a 6259 card, VS splits that up as Port 0 and Port 1.  Thing is, the 6259 has 0..31 on Port 0.  So, pick an IO from Port 1, say bit 0.  Remap it to Port 0, bit 9.  Although the user interface changes, the Physical address doesn't and it continues to map it to port 1.  The Output mapping has the opposite problem: the physical address changes but the user interface doesn't.  Do you know of any work around for mapping Digitals?     

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That is a known issue in 2009 (fixed in 2010 though).

One workaround I can think of is to not use the MIO DIOs. When you add the digital lines, switch to the DIO device type and change the port width there.

 

Let me know if that works

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Success!  That did the trick.  Under DIO it allowed me to specify a Port width of 32 to match the 6259.  After that I just manually mapped the ports as you suggested.  Thanks. 

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