04-29-2014 04:18 AM
Hi guys,
i´m using a PXI 1031 Chassi with a NI PXI-7830R board.
When i want to deploy the system definition file in VeriStand 2013 this error appears:
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The VeriStand Gateway encountered an error while deploying the System Definition file.
Details:
Error 66 occurred at Project Window.lvlib:Project Window.vi >> Project Window.lvlib:Command Loop.vi >> NI_VS Workspace ExecutionAPI.lvlib:NI VeriStand - Connect to System.vi
Possible reason(s):
LabVIEW: Der Übertragungspartner hat die Netzwerkverbindung beendet. Wenn Sie die Funktion "VI-Referenz öffnen" auf eine VI-Server-Verbindung mit einem anderen Computer anwenden, überprüfen Sie unter Werkzeuge>>Optionen>>VI-Server, ob dem Computer Zugriff gewährt wird.
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NI VeriStand: ??? in Server TCP Interface.lvlib:TCP Send Loop.vi:3000002->Server TCP Interface.lvlib:TCP Connection Manager.vi:7430001
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In english: LabVIEW: The transfer partner has completed the network connection. If you select "Open VI Reference" function applied to a VI Server connection to another computer, check under Tools >> Options >> VI Server, whether the computer is granted access.
What i have done:
I created in LabVIEW 2013 a new "NI VeriStand FPGA Project" and modified the Vi as needed, built the bitfile and modified the .fpgaconfig, like it is described in this tutorial https://decibel.ni.com/content/docs/DOC-13815#Release_Version_History . After that i loaded the .fpgaconfig into the VeriStand system definition. Until here no errors....now i want to deploy it and the error appesared i mentioned above.....
I don´t have any idea what i could do now.
If you need any files for more understanding please tell me what you need.
yannick
05-02-2014 04:05 AM - edited 05-02-2014 04:17 AM
Hi Yannick, have you installed the NI VeriStand RT engine onto your RT-Device? Maybe these links are also usefull
=> http://digital.ni.com/public.nsf/websearch/E1B8CA0B546A803486256A33005AF221?OpenDocument
=> http://digital.ni.com/public.nsf/allkb/E94F4699B7FB82E086256B6E007B0AB3
05-06-2014 06:18 AM
Hi Daniel,
thanks for your answer.
Yes, i installed the RT engine on the device and i followed the instructions from your links.
But nothing changed, same error...
05-06-2014 08:00 AM
Hi yannickreiter,
Does your 'modified vi' call the .NET API? Calling .NET API from RT-Engine won't work and will generate error -66.
If you open console viewer, you can see that your RT-Engine generates that error and might be rebooted or just hang...
Check again your 'modified vi'.. Hope i can help....
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Rajamodol
05-06-2014 08:36 AM
No i don´t call the .NET API in my VI.
In the console viewer it only says this:
Error code: -50400
Error Message: NI Platform Services: The transfer did not complete within the t
imeout period or within the specified number of retries.
05-06-2014 09:56 AM - edited 05-06-2014 09:58 AM
Hi Yannick, are you using the right *.fpgaconfig file? Also the size of <DMA_Write> and <DMA_Read> in .fpgaconfig file must be equal to the number of packets and not to the number of elements in the FIFO properties. So make sure the number of packets in your .fpgaconfig XML and the number of packets your FPGA code are sending/receiving actually match
05-06-2014 10:38 AM
I think so....maybe you have a look at the files. I changed the .fpgaconfig to an .txt, so don´t be confused 😉
As i mentioned in my problem on top i followed the steps from those links i attached and customized the vi as i needed.
11-24-2014 02:20 AM