VeriStand FPGA XML Builder Node Feedback

[MrV_HIL]

did you solve this problem？？？

[Pianne]

Which problem are you referring to, MrV_HIL ?

[ciro.007]

Hi,

Yes, I solved the problem. 

---

Thanks. 

CO

[MrV_HIL]

When I generated xml file，I got this problem：

and the “<LabVIEW Data>\VeriStand FPGA XML Builder Error.log ” show some error logs like these：

Date: 2020/5/13
Time: 8:55
Error: 1055
Error Source: Create and Wire Index for Unpack Booleans.vi->Boolean Outputs for Index Array.vi->XNode_BuildAction.vi->FPGA XML.xnode:GenerateCode.vi:6040001->FPGA XML.xnode:GenerateCode.vi.ProxyCaller

I have uploaded my demo project attachment，please help me to fix this problem！！！

Many Thanks ！！！

[MrV_HIL]

Hi,

Can you tell me how to fix this problem？

Many thanks

[Ryan_S]

You're likely hitting known issue #5 listed on the download page. See the workaround listed there (add at least one numeric channel).

--Ryan_S

[MrV_HIL]

hi，Ryan_S

I got it，thanks！！！

[ARLROB]

This is the exact problem I am having, integer data simply doesn't work, I will try the Fixed Point Data workaround, I am using Versitand 2018 SP1. 

[MrV_HIL]

how can I use it with my NI 985x I/O modules？？？

[Ryan_S]

That's not a good idea...this node is meant for single point data, not communication protocols.

You would use a custom device within VeriStand for those modules.

--Ryan_S