This LV FPGA project is a proof-of concept for a run-time configuration macrocell for SDR. The purpose is to maintain flexibility while elimination the need for long FPGA compile cycles. Although it is implemented on NI hardware, it can be run in development mode using LabView & LabView FPGA. You will also need to install the modulation toolkit to access all of the features.
For an evolution of the design and an overview of the process, also see: "Using a graphical interface for Fast FPGA design revision in SDR_v2.ppt" - this paper was presented at the Wireless Innovation forum in Washington, D.C. on December 1, 2011.
Frank Raffaeli
